It seems like the write enable commands work in the simulation model but I'm having some problems with the read command (03h). I'm using the VHDL simulation model and it seems to be outputting unknowns (Xs) when I'm expecting read back data. Is there any reason for this? I'm trying to figure out why what I'm doing wrong. The serial clock is 12.5 MHz so it should work or at least thats what i was expecting. See simulation below.
could it be because im not preloading the memory again and the memory is defaulted to Xs?
From my memories, you don't have to wait for write enable command and you can start to write or erase immediately
1.if you use simulation model, see if the instructions(06h or others) you send in is correct. Then check for the status register 1 (SR1) bit (WEL) to see if you send write enable(WREN) successfully
2.if you send WREN successfully, then you can start writing.
Notice Page Program operation needs time to finish, you can read status register 1(SR1) bit (WIP) to check if it's finish.
You can find the time specifications from Embedded Algorithm Performance Tables, which gives out the typical and maximum time. In reality, the time spent might be a little bit different, but you can read WIP to check for the real time.
3.if you find WIP hold high while you write in(Page Program) and after some time(us) it goes low, it means you already write in what you want.