....Trying to get the simulation model working because there doesnt seem to be information on a buffer to write waveform in the datasheet. Figure 11.14 in the datasheet goes into a page program but not a buffer to write command sequence. When I write a large file every place is going to 0000 instead of non-zero values like how my FPGA is driving it as I can tell using a debugger. Either I'm doing it wrong the write to buffer command sequence wrong with the read/busy signal, or I have a failure in the flash or some hardware issue. Right now I'm thinking its something to do with VHDL source code. The datasheet really should have a write to buffer waveform to show the differences and be more clear.
Attach is a complete run dir including pre-load files that can serve as an example.
The code is executing in QuestaSim. You can use that as is:
vsim -sdftyp s29gl512s_vhdl.sdf testbench_s29gl512s_vhdl
S29gl512s.zip 2.1 MB