I2CHW slave, what happens if master writes again before I2CHW_ClrWrStatus is called?

[twam_4766031]

My application has a PSoC1 acting as I2C slave using I2CHW. After the master writes some data, the slave needs some time to process the data before it can accept another write.

So what happens when a master writes data successfully, and then try to write again before the slave have called I2CHW_ClrWrStatus? Assume the previous successful write does not overflow the write buffer. Does the slave a) NAK its address, b) ACK its address but NAK data bytes, and does not write anything to the write buffer, c) ACK address and data, and write received data in the remaining space of the write buffer, or d) something else?

More generally, what's the best approach when some down time is required between writes? I would like to make sure that when a master attempts to write before the slave is ready, a) data already received by slave is not accidentally overwritten, b) the master knows that the write is not successful so it can try again later.

Essentially:

for (;;) {
    I2CHW_InitWrite(...);
    while (!(I2CHW_bReadI2CStatus() & I2CHW_WR_COMPLETE));
    /* put I2CHW_ClrWrStatus() here? */
    ProcessData();
    /* or put I2CHW_ClrWrStatus() here? */
}

Message was edited by: twisteroid ambassador

[twam_4766031 · Accepted solution]

I did some testing, and the answer to the original question is:

When the master tries to write again, the slave will ACK to both address and data, and write received data into the remaining space of the receive buffer, until the receive buffer is completely filled.

This behavior is the same if the attempted write is before the next I2CHW_InitWrite, regardless of whether I2CHW_ClrWrStatus has been called.

In order to deny the write, the slave had to call I2CHW_DisableSlave after receiving, and then call I2CHW_EnableSlave and I2CHW_InitWrite when it's ready to receive again.