4 Replies Latest reply on Sep 14, 2020 9:09 PM by XiaoweiZ_71

    Are certain UDBs "closer" to certain ports than others?


      My design is using almost all I/O of the 124-pin BGA package (76/87, or 88%) and depending on where I drop pins I get different timing analysis and PLD packing results. There will be some software controlled pins as well, but most are controlled by UDBs or SCBs and some are analog with their own restrictions. Is there a way to make life easier for the toolchain by picking pins that are (probably) easy to route to from a UDB? Or, putting it differently, are certain UDBs closer to certain ports than others? I know that the possibilities to re-route SCBs are very limited, but there should be an optimal solution for the rest.


      There are obvious and documented limitations in the analog routing, where I had to place a few pins on certain AMuxBus segments to help find a solution. Does such a strategy exist for the digital part as well?