2 Replies Latest reply on Aug 28, 2020 8:00 AM by LePo_1062026

    PSoC5 programming after a long time on a shelf

    PiWy_2406846

      PSoC5LP specifies flash retention time of 10 years. Now, let's assume that a board has spent so much time on the shelf that flash has got corrupted. Is there a way to reliably re-program an MCU in this condition? I believe the bootloaders, e.g. I2C, cannot be trusted, as they occupy the same flash and are subject to corruption as well. Can the SWD/JTAG interface be expected to work, or is there some volatile flash portion present there as well?  

        • 1. Re: PSoC5 programming after a long time on a shelf
          BragadeeshV_41

          Hi PiWy_2406846,

           

          Yes, you will be able to reprogram the device using SWD, but we do not guarantee the retention capability of the flash after the elapsed period.

           

          Regards,

          Bragadeesh

          • 2. Re: PSoC5 programming after a long time on a shelf
            LePo_1062026

            Bragadeesh,

             

            Even if the previous Flash programming has exceeded the retention time, there should be a number of factors, in this case, that the retention time should FAR exceed the 10 years:

            • The CPU should have been dormant (ie. No power applied).  FLASH retention would be diminished with multiple reads and writes over 10 years.  On the shelf:  ~ 0 reads and writes.
            • CPU on the shelf at reasonable room temp (~20C) and humidity (< 50%RH).

             

            Even if the Flash original programming was not retained after 10 years, a FULL successful reflash should allow for another 10 years of retention.

            If the product is using a Bootloader, then the Bootloader is in jeopardy of  retention corruption.  The newly Bootloaded program should be good for another 10 years.

             

            May I propose another root cause:  The original FLASH programming occurred in marginal conditions.  If this is the case, most likely this is due to a VDD being marginally low or transiently dropping during the programming phase.   This could cause the FLASH to marginally programmed and might retain data immediately after programming but would prematurely cause the retention time to be reduced.

             

            PiWy,

            There's many assumptions in your original post.   Have you proven that the boards on the shelf are no longer working "as is"?

             

            Len