HI Cypress Team,
In my custom board which uses PSOC62 BGA part: CY8C624ABZI-S2D44, we are facing issue in configuring the pull-down.
Can you please let me know your feedback on below:
1) What is the Strong Pull down value for PSOC62?
2) What is the Weak pull down value for PSOC62?
3) I wanted to configure my IO (P12.0) as Input with Weak pull-down, Please let us know the proper procedure to configure it correctly.
4) The same design is working fine on PSOC4 based custom board.
I've tried to look up the information in the part's datasheet. The best I could come up with is a pull-down resistance spec for the GPIO of 3.5kΩ min, 5.6kΩ typ and 8.5kΩ max. I assume this is the strong pull-down. I could not find the "weak" resistance spec.