- Default values are used for Status Registers and write protections are not enabled by software.
- Please note that we are initially able to write to locations beyond 0x10000 and after some write cycles we are unable to write to these locations.
- We are still able to write to locations 0x0000 to 0xFFFF.
Is this a known issue for this device?
Because the BP1/BP0 bits are nonvolatile, the protection state will be preserved even after a power cycling.
So, once the BP1/BP0 bits are accidentally set, further write accesses are prohibited.
Please check the value of the status register by reading the register with the RDSR command.
We are seeing upper 64K is getting write protected inadvertently in FM25V10 device. The software ‘never’ attempts to write the FRAM Status register and it is left with factory default value of ‘0x40’ on power-up.
The data was written initially beyond 0x10000 (upper 64K) and then the upper 64K is getting blocked inadvertently. Reading of FRAM status register shows the value as ‘0x48’(BP1 bit is set to ‘1’ and BP0 is set to ‘0’) indicating upper 64K block write protection. We aren’t clear what is causing BP1 bit to get flipped when the software ‘never’ attempts to write the FRAM status register.
SPI is configured for 20MHz. Also, we do not see any data loss/incorrect data and we are able to read data correctly from upper 64K memory.
We have connected “Write Protect” WP# pin to system reset, hence on power up the this pin will be “LOW” and after few ms when the system is out of reset this pin will become “HIGH”.
Can you provide us some more information as below. It will help us to understand better as to why the device status register is being written.
1) Have you soldered the exposed pad onto the PCB.
2) How many devices are showing these behavior.
3) Are you powering up the device as per the datasheet parameters. (Is tPU, tVF, tVR spec followed as per datasheet)
4) Can you provide the top marking for the device.
Is it possible for you to connect the WP pin to GND and set the WPEN bit in the status register. This will forbid any write to the status register and if the BP bits are being set even after this measure then the device may not be configuring up properly or may be faulty.