3 Replies Latest reply on Aug 18, 2020 11:02 PM by RodolfoG_11

    Error when trying to assign .po() for a datapath

    ChRe_4711096

      I'm trying to make a CPU-writable 9-bit latch that forwards from D0 and D1 to parallel out and (as 9th bit) A1==0, when INSTR_ADDR[0] == 1. The instruction at address 1 simply loads A0 from D0 and A1 from D1. A0 should be the parallel output, and is split into single bits (Ap, Ac, Bp, Bc, Cp, Cc, Ain0, Ain1).

       

      I've pre-configured my datapath using the UDB editor, copied the generated verilog code to a new file, and modified it to connect the datapath's parallel output to a module output - see attached file.

       

      However, I'm getting the following error:

      Pin guidance unavailable: 'po' not a port of module 'cy_psoc3_dp8'

       

      How do I connect to a datapath's parallel out? The Appendix of AN81256 wasn't helpful either. The examples say "parallel in" or "parallel out", but they don't actually connect anything using pi() and po().