2 Replies Latest reply on Aug 17, 2020 2:59 PM by AlbertB_56

    Semper Flash with Octal Interface S28HS256T: LSb of address in Octal DDR transactions

    MoSa_4200611

      Hello,

       

      It is mentioned in the specification that "The LSb of the address always be zero in any Octal DDR transactions with the address input."

      1) Does this apply to any read or write transaction?

      2) How can this work for WRARG (Write Any Register) where such commands are meant to access one register location (one byte) only. It is clearly mentioned in the specification that : "The Write Any Register (WRARG_C_1 / WRARG_4_1) transaction provides a way to write any device register, nonvolatile or volatile.

      The transaction includes the address of the register to be written, followed by one byte of data to write in the addressed register (see

      Section 6. Transaction Table)."

      Then, how can odd addressed registers be written? For instance, CR2 (at address 0x00800003)