5 Replies Latest reply on Sep 8, 2020 12:43 AM by RakshithM_16

    PSoC 6 Change Memory Layout


      I will be using the PSoC 6 to store a firmware image to then program other PSoCs. For now I just want to store 512kB of data on its internal flash.

      I went through the PSoC6 MCU Basic Device Firmware Update document(CE213903) and that found I could store about 256kB onto its internal flash, but higher than that I run into problems. I am just using cy_flash.h, specifically Cy_Flash_EraseRow and Cy_Flash_ProgramRow to store my data.


      From the Memory layout in CE213903 it appears 128kB are sectioned off for app1 core0, and app1 core 1. I want to increase this size to be 512kB, but I am not sure what to change in the linker files(dfu_cm4.ld, and dfu_cm0.ld) to increase the memory sectioned off. The memory map shows that there are 639kB starting at 0x1006 0000 that are empty/reserved so I am hoping to use that.


      Does anyone know how to modify those linker files to allow me access to 512kB of memory?

        • 1. Re: PSoC 6 Change Memory Layout



          The code example CE213903 contains two applications which are called App0 and App1. App0 generally contains a communication component which loads application 1 to Flash or external memory. This method is generally used to update the application 1 in your device through communication interfaces like I2C, UART, SPI, CAN or BLE.


          From your description, I understood that your application stores the .hex image of some other application in the Flash and program the other PSoC separately. Am I correct? If yes, you need a single application/ normal application (not DFU/Dual application) to serve your purpose. You can directly store the hex file in the Flash using the qualifier const in your application.


          Hope this helps and can you please let us know what is the procedure that you are following to program a PSoC from your application?




          • 2. Re: PSoC 6 Change Memory Layout

            I was just building off of that example since it had code that wrote to the internal flash, but yes you are right my application stores the hex image of another application.


            I send a .hex image over UART from a PC to PSoC #1, and intend to store it in internal flash. Then later I will send the data from PSoC#1  to other PSoCs. Can I use the const qualifier to store the .hex image on PSoC#1 ?

            • 3. Re: PSoC 6 Change Memory Layout



              If you are sending the hex file from PC to PSoC 1 during run time you cannot use the const type qualifier. Those constants which are defined during compile time only has constant qualifiers. In your case you have to use global variable buffer only.


              Few questions:

              1. From your decription, you want to send the hex file from PC to the PSoC #1 and from there you want to program other PSoC correct? If so, can we know why you are not directly programming the other PSoC s from the PC?


              2. Is it possible for you to store the hex file in PSoC#1 during compile time itself ? because the amount of Flash as well as SRAM available in PSoC differs from family to family. What the part number of PsoC 6 device that you are using? Please refer the following 2 datasheets for difference in memories between two PSoC families.






              Thanks and regards


              • 4. Re: PSoC 6 Change Memory Layout

                Hi Ganesh,


                1. I need to do some other GPIO, and analog functions in the same location and the same time so it makes more sense to use a microcontroller to do it. Otherwise I would need both a PC and a microcontroller.

                2. Occasionally I will want to upload a new version of the firmware image to PSoC#1. So I think UART is a better way to do it than at compile time. I am using the CY8C6347LQI-BLD52


                It looks like the file cy8c6xx7_cm4_dual.ld actually handles the memory allocation for the cm4, and cy8c6xx7_cm0plus.ld for the cm0.

                I'm not using the cm0 for anything, is there a way to give cm0 no memory so I can have more room for cm4 and for flash storage?



                • 5. Re: PSoC 6 Change Memory Layout

                  Hi RyWi_4724536,


                  Regarding your last question:

                  I'm not using the cm0 for anything, is there a way to give cm0 no memory so I can have more room for cm4 and for flash storage?

                  In the boot sequence, CM0+ is enabled and this inturn enables CM4 CPU. So you cannot remove all of CM0+ flash memory. However, you can reduce the flash allocated for CM0+ by following these steps:


                  1. Reduce flash LENGTH (default 0x80000) in cy8c6xx7_cm0plus.ld as shown -


                  2. Set the right flash ORIGIN (default 0x10080000) in cy8c6xx7_cm4_dual.ld and increase the LENGTH of flash -


                  3. Copy the ORIGIN value (0x10070000 in this case). Open main_cm0p.c and update the Cy_SysEnableCM4() argument -


                  I have also attached a blinky LED test project for your reference. Please let us know if you have any further queries.


                  Thanks and Regards,

                  Rakshith M B