3 Replies Latest reply on Aug 10, 2020 3:07 PM by AlbertB_56

    Tees and Ters in the S29GL512P datasheet?

    ChVi_4748466

      I was searching for the Tees (Evaluate Erase Status) and Ters (Erase Resume to Next Erase Suspend) parameters in the S29GL512P datasheet, but haven't found them. Do you know what the values for these parameters are?

        • 1. Re: Tees and Ters in the S29GL512P datasheet?
          AlbertB_56

          Hello,

           

          Thank you for contacting Cypress Semiconductor.

           

          In regards to Sector Erase/Chip Erase operation, refer to pgs. 25 to 27 (sections 7.7.3 - 7.7.4)

          In regards to Program/Erase Suspend-Resume operation, refer to pg. 28 (Section 7.7.5)

           

          In regards to checking/reading Erase status, refer to pgs. 31 to 34 (sections 7.8.1 - 7.8.6)

           

          For Timing Diagrams :

          Data# Polling & Toggle Bit Timings (During Embedded Algorithms), refer to pgs.58 to 59 (Figs. 11.12 - 11.13

           

          There is no minimum or maximum time requirement between Erase Suspend to the next Erase Resume.

          The time in which the Erase Suspend is initiated and when Erase Resume is initiated is user defined.

           

          URL to S29GL512P datasheet :

             https://www.cypress.com/file/219926/download

           

           

           

          Best regards,

          Albert

          Cypress Semiconductor Corp.

          An Infineon Technologies Company

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          • 2. Re: Tees and Ters in the S29GL512P datasheet?
            ChVi_4748466

            Thanks! I noticed that the datasheet for the S29GL512T defined a typical erase resume to next erase suspend time, but the S29GL512P datasheet didn’t. Is there a difference between the  typical erase resume to next erase suspend time in these parts?

            • 3. Re: Tees and Ters in the S29GL512P datasheet?
              AlbertB_56

              Hello,

               

              Yes, there is a difference between the S29GL512T and the S29GL512P, as the S29GL512T has a built-in Embedded Algorithm Controller (EAC), which the S29GL512P does not have.  Therefore, ~100uS(min) delay is required when the PROGRAM or ERASE RESUME command is initiated to allow the EAC to complete any remaining PROGRAM or ERASE operation to full completion, before the next SUSPEND mode can be initiated.

               

              The S29GL512P does not have an internal EAC.

               

               

               

              Best regards,

              Albert

              Cypress Semiconductor Corp.

              An Infineon Technologies Company