3 Replies Latest reply on Jul 30, 2020 12:00 AM by YashwantK_46

    Missing data while streaming Raw Video

    ChDi_2864936

      Hello,

       

      Recently I am implementing firmware for a project where we need to stream (5120*720) sized frames from FPGA to Windows PC.

      Our plan is to achieve 60fps, and we have a requirement of 100% of data should be delivered at the PC side.

       

      This is how GPIF Connects and the State machine is implemented.

      I am using 8 buffers of 16kB long.

       

      Currently, I am using Bulk endpoint where we need to guarantee that all the data is presented at the PC, but we are losing so much data.

       

      On the PC side, I am using the following mechanism in a separate thread.

       

                                int len = BufSz;

                      EpBulkIn_ImageData.TimeOut = 5;

                      bool isSuccess = EpBulkIn_ImageData.XferData(ref xferBufs[bufferIdx], ref len);

                      if (!isSuccess)

                      {

                          failures++;

                          continue;

                      }

                      if (len > 0)

                      {

                          try

                          {

                              ImageRawBuff imgRawBuff = new ImageRawBuff();

                              imgRawBuff.pBuff = xferBufs[bufferIdx];

                              imgRawBuff.size = len;

                              if (g_Que_CollectorBufferPointer.Count >= const_GBuffQueSize)

                              {

                                  g_Que_CollectorBufferPointer.Dequeue();

                              }

                              g_Que_CollectorBufferPointer.Enqueue(imgRawBuff);

                          }

                          catch (Exception err)

                          {

                          }

                      }

       

       

      Please suggest me if I am doing something wrong, or if there is any better way to achieve this.

       

      **Currently, I am trying to use the Isocronus endpoint to transfer frames to achieve the FPS that we required.

       

      Please let me know if you need more information.

       

      Thanks for the help in advance.

        • 1. Re: Missing data while streaming Raw Video
          YashwantK_46

          Hello,

           

          Can you please let me know of the following details:

          1.) What is the data format being used in the application?

          2.)What is the bits/pixel being used?

          3.) Is the application UVC compliant or non-UVC device?

          4.) Is the firmware based on the app note AN75779 or your custom firmware?

          5.) is the state machine based on AN75779 or slaveFIFO (AN65974) for transferring video stream?

           

          Regards,
          Yashwant

          • 2. Re: Missing data while streaming Raw Video
            ChDi_2864936

            Hello Yashwant

             

            Thank you for your quick response,

             

            1.) What is the data format being used in the application?

            Raw

            2.)What is the bits/pixel being used?

            8 bits

            3.) Is the application UVC compliant or non-UVC device?

            No, Custom device

            4.) Is the firmware based on the app note AN75779 or your custom firmware?

            No. Custom Firmware

            5.) is the state machine based on AN75779 or slaveFIFO (AN65974) for transferring video stream?

            No. We are using single thread based state machine

             

            Regards,

            Chath.

            • 3. Re: Missing data while streaming Raw Video
              YashwantK_46

              Hello Chath,

               

              "No. We are using single thread-based state machine"

              => This could be the possible cause of the data loss that you are facing.

               

              Can you please let me know how the FPGA is interfaced with FX3?

              Does the FPGA provide frame valid, line valid, and PCLK (see attached UVC.jpg), or, over a slaveFIFO interface (see slaveFIFO.jpg)?

              Please clarify.


              Regards,
              Yashwant