1 Reply Latest reply on Jul 27, 2020 9:15 PM by EktaN_26

    Has USBFS operation at low clock frequency been fixed?


      In Cypress example code that uses USBFS 2.50, there is this custom code section in USBiAP_episr.c for operating at low clock speeds to reduce power consumption:

      /* Workaround for ARB interrupt failure issue at low CPU speeds like 3 MHz: 
       * When CPU clock is running slow (3MHz or so) It takes 8 times more time to execute the IN_DATA_RDY clear flag 
       * instruction inside the ARB isr code after arming the IN endpoint. In this time, if the USB block receives an 
       * IN token for the endpoint which was armed, it will process the IN token and complete the IN transfer, before the 
       * IN_DATA_RDY flag is cleared by ARB ISR. Workaround for this issue is clear the flag first and then write mode register */
          /* Clear Data ready status*/
          /* Write the Mode register */
          USBiAP_SIE_EP1_CR0_PTR[ptr] = USBiAP_EP[ep].epMode;                            


      Has this been fixed in a later version of USBFS?  This is preventing me from updating to 3.0 or higher, since the variable names changed.


      Actually, I see that all this workaround does is swap the order of the two lines "Clear Data ready status" ↔ "Write the Mode register".


      And it looks like this swap was also done in the upgrade from 2.50 to 2.60? 

      2020-07-21 13_56_05-WinMerge - [Untitled left - Untitled right].png


      So it seems I can remove this custom code section?


      But I don't see any note about this in the datasheet for version 2.60.  I worry that it was forgotten about and the underlying issue might be back in later versions?


      In 3.0, the "Clear data ready status." line still occurs first, but the "Write the Mode register" line seems to have been replaced by "Arm IN endpoint." which I think does the same thing