6 Replies Latest reply on Jul 24, 2020 11:34 PM by zapa_4702046

    VBUS does not reach VSAFE5V

    zapa_4702046

      what values  Vbus expected  where i could find  specification ?

        • 1. Re: CYPD3175 app_evt_t Unexpected high voltage seen on VBus
          MallikaK_41

          Hello,

           

          Please refer below to the attached images for the VBUS tolerance range specifications.

           

          p1.png

          The output voltage of a Fixed Supply PDO remains within the range defined by the relative tolerance vSrcNew and the absolute band vSrcValid.

           

          p2.png

           

          3.png

          The min value of vSrcNew and vSrcValid is on the left and the max values are on the right.

           

          You can refer to the Power Supply section of the PD Specification for detailed understanding.

          The PD spec can be found here https://www.usb.org/documents

           

          >>Can you please specify if you are using our EVK or a custom board for the project?

           

          Best Regards,

          Mallika

          • 2. Re: CYPD3175 app_evt_t Unexpected high voltage seen on VBus
            zapa_4702046

            Hi MallikaK  ,

             

            please refer to attached document    my older question was not accurate  the  subject is  VBUS does not reach VSAFE5V

            the  same FW CLA  run on CY4532 EVK  and work as expected

             

            AMS design vs EVK 

            • type connection to DC/DC component  EVK is analog we use digital
            • AMS design not use BUCK_BOOST_EN_C

             

            Q1: is there differential  between requests device to be charge and APP_EVT_PD_CONTRACT_NEGOTIATION_COMPLETE  and set volt or current  to DC/DC component ? 

            • 3. Re: CYPD3175 app_evt_t Unexpected high voltage seen on VBus
              MallikaK_41

              Hi,

               

              From what I understand, with the custom board you are using, VBUS is not reaching 5V in the defined time period (as per the timer expiry value).That is why you are entering app_psrc_tmr_cbk function. You tried to increase the timer period from 250ms to 450ms but still VBUS did not stabilize to 5V. You  suspect if the issue is occuring because of the different design board and DC-DC converter you are using.

              Have I understood the issue correctly?

               

              This maybe happening because the buck-boost regulator is not setting the proper voltage on VBUS. When VBUS doesn't reaches the expected value within the defined timer period, FETS are turned off and VBUS discharges. You can refer to the psrc_shutdown() in the firmware to understand this. This maybe the reason in your case.

               

              Also, the time required for VBUS to reach VSafe5V is defined by the PD spec,i.e. 275 ms. So there is no need to modify the value of the timer expiry period. We just need to ensure the proper voltage on VBUS.

               

              Can you share the schematics of your system so that we can further debug and understand the reason of this issue ?

               

              Best Regards,

              Mallika

              • 4. Re: CYPD3175 app_evt_t Unexpected high voltage seen on VBus
                zapa_4702046

                Hi,  please refer to this descrption insted the doc

                our board. We get error - "VBUS does not reach VSAFE5V".

                We selected to start with an example - CCG3PA Car Charger (CLA).

                We used PSoC creator 4.2.

                 

                We changed part number from CYPD3171 to CYPD3175 following the instructions in Cypress EZ-PD™ CCGx Power SDK User Guide.pdf section 4.3 Part Number Update (including the bootloader)

                 

                The set up was:

                       AMS Board based on CYPD3175 

                       Miniprog3 connected

                       Load: we connected CY4533 to the USB-C connector of the AMS board with standard USB-C cable.

                       Enabled SWD interface in system tab

                 

                Step 1: Customized CCG3PA Car Charger (CLA) example PSoC creator 4.2 

                 

                1.      Disabled CCG_TYPE_A_PORT_ENABLE  in stack_params.h

                2.      Disabled Page type A

                3.      Enabled SWD interface  in system tab

                4.      Added three breakpoints in the psrc_enable: before and after switch on  ( VBUS_P_CTRL ) and one at  app_psrc_tmr_cbk function in case "APP_PSOURCE_EN_TIMER"

                5.      Added debug messages  in app_event_handler function in the flowing cases: 

                 

                APP_EVT_TYPEC_ATTACH

                APP_EVT_DISCONNECT

                APP_EVT_PD_CONTRACT_NEGOTIATION_COMPLETE

                etc.

                6.Also we mesurment in function vbus is present  the compertor sample always return 0

                7.REGULATOR_REQUIRE_STABLE_ON_TIME disabled in our design

                8.pd_hal_set_vbus_csa_rsense(pd_get_ptr_pwr_tbl(0)->cur_sense_res) -disable

                9.pd_remove_internal_fb_res_div()- disable

                10.APP_VBUS_SET_VOLT_P1 yet implement in our design does it disturbed get correct flow sdk

                11.BUCK_BOOST_EN_C_Write(0) disable in our design we not used en/dis dc/dc does it could enfluence?

                #define APP_VBUS_SRC_FET_ON_P1()                    \

                {                                                   \

                    pd_internal_pfet_on(0, false);                  \

                   /* BUCK_BOOST_EN_C_Write(0);*/                       \

                }

                 

                #define APP_VBUS_SET_VOLT_P1(volt_mV)             vbus_ctrl_fb_empty(TYPEC_PORT_0_IDX, volt_mV)

                #define APP_VBUS_SRC_FET_OFF_P1()                   \

                {                                                   \

                   /* BUCK_BOOST_EN_C_Write(1);*/                       \

                    pd_internal_pfet_off(0, false);                 \

                }

                 

                Step 2: Running Debug mode:

                 

                1.1.    Log  measurement of VBUS_MON via pd_hal_measure_vbus(0) and in parallel measuring the voltage with a Scope on the Vbus (where Vbus_mon is connected to the Vbus). All the following is done before closing the P-Switch. 

                 

                b[INFO]: [main]AMS Power Dynamic Supply

                [POWER RT]: [print_power] W= 0 [mW] U=ea [mV] I= 0 [mA]

                [APP EVENT]: [app_event_handler]Type-C AttachWait state entered

                [POWER RT]: [print_power] W= 0 [mW] U=c3 [mV] I= 0 [mA]

                 

                (Scope also showed ~234mV, in all times)

                 

                1.2.    Log measurement VBUS_MON via pd_hal_measure_vbus(0) after closing the P-Switch

                [POWER RT]: [print_power] W= 0 [mW] U=1360 [mV] I= 0 [mA]

                [APP EVENT]: [app_psrc_tmr_cbk] APP_PSOURCE_EN_TIMER expired

                [APP EVENT]: [call_psrc_ready_cbk]Send Ps_rdy

                 

                (Scope also showed 4,950-5,000 mV)

                 

                 

                Step 3: Continue debugging without stop. During 250 mS the software measure VBUS_MON but the result is below the expected VSAFE5V. Therefore (we assume) we get the error situation, and the P-Switch is opened.

                 

                [POWER RT]: [print_power] W= 0 [mW] U= 0 [mV] I= 0 [mA]

                [APP EVENT]: [app_event_handler]Type-C AttachWait state entered

                [POWER RT]: [print_power] W= 0 [mW] U=c3 [mV] I= 0 [mA]

                [POWER RT]: [print_power] W= 0 [mW] U=c3 [mV] I= 0 [mA]

                [APP EVENT]: [app_psrc_tmr_cbk] APP_PSOURCE_EN_TIMER expired

                [APP EVENT]: [call_psrc_ready_cbk]Send Ps_rdy

                [POWER RT]: [print_power] W= 0 [mW] U= 0 [mV] I= 0 [mA]

                [APP EVENT]: [app_event_handler]Type-C AttachWait state entered

                [POWER RT]: [print_power] W= 0 [mW] U=c3 [mV] I= 0 [mA]

                [POWER RT]: [print_power] W= 0 [mW] U=c3 [mV] I= 0 [mA]

                [APP EVENT]: [app_psrc_tmr_cbk] APP_PSOURCE_EN_TIMER expired

                [APP EVENT]: [call_psrc_ready_cbk]Send Ps_rdy

                [POWER RT]: [print_power] W= 0 [mW] U= 0 [mV] I= 0 [mA]

                [APP EVENT]: [app_event_handler]Type-C AttachWait state entered

                 

                (Scope showed 4,950-5,000 mV during the first 250mSec after the P-Switch is closed)

                 

                           

                AMS Vs. Cypress EVK

                •       Power Source is DC/DC controller in both cases. In Cypress, the DC/DC is controlled by the FB signal (analog), and in AMS via I2C (Digital).

                •       AMS measures the current via external Current monitor whose output is samples by a GPIO A/D, where in Cypress it is done via CSP pin.

                •       AMS DC/DC controller is always Enabled, where Cypress DC/DC has Enable signal that is controlled by a GPIO of the Cypress Controller.

                 

                Our questions:

                Q1: What can be the reasons we receive this error message?

                Q2. It seems the A/D measurement is not correct in Step 3.

                The measured Vbus value, with a scope, is 5V, yet the Vbus_Mon shows much lower value.

                What can be the reasons for it? In other scenarios, when we measured 5V through the Vbus_Mon, the measurement was correct.

                 

                Since we cannot progress, appreciate your help and guidance in solving the reported problem

                 

                Thanks in advance for your help

                • 5. Re: VBUS does not reach VSAFE5V
                  MallikaK_41

                  Hi,

                   

                  Can you share the schematics of the custom board?

                   

                  Best Regards,

                  Mallika

                  • 6. Re: VBUS does not reach VSAFE5V
                    zapa_4702046

                    We have open case#00545310 with issa and other cypress FAE so we send there all require info shematics

                    Courcode and elaborate doc which describe the changes of CLA example

                    Please review it we wating for answer of

                    case#00545310

                     

                    All question which not regard to NDA we could continue coresponding here

                     

                    Thanks for all help