2 Replies Latest reply on Jul 10, 2020 12:28 AM by GiCA_4732761

# SCLK frequency and Baud rate

Hello,

In the MB9B410T Series datasheet (Document Number: 002-04689 Rev. *E), page 91, concerning CSIO,

Baud rate = 8 Mbps max

Serial clock cycle time = 4tCYCP min

where "tCYCP indicates the APB bus clock cycle time"

If we consider that tCYCP min = 13.8 ns = 1/72 MHz that makes a maximum of 72/4 =18 Mbps ?

So why is the maximum specified baud rate 8 Mbps ?

Gilles Carré

dipl. ing. eln.

• ###### 1. Re: SCLK frequency and Baud rate

The description of CSIO Baud Rate Settings in FM4 TRM page#139 might be helpful to this topic - https://www.cypress.com/file/222976/download

1 of 1 people found this helpful
• ###### 2. Re: SCLK frequency and Baud rate

Thanks ShipingW_81  !

So far I understand it, max baud rate is not defined by the max frequency of the APB bus.
There must be other limitations in the hardware.

MB9B410T does have a max frequency of  72 MHz.

But with a 72 MHz frequency, the minimum value of BGR1/0 register, that is mentioned by the datasheet (Table 6-1 Reload Values and Baud Rates) is 8.
Hence the max bit rate is:
b = (72000000) / (8 + 1) = 8 Mbps according formel (1)

Conclusion, for all microcontrollers of the FM4 family the max baud rate is 8 Mbps.