4 Replies Latest reply on Jul 21, 2020 4:37 AM by LePo_1062026

    Effect of compiler optimization on operation

    hata_3396041

      Hello

       

      It would be very helpful if you could get an answer as soon as possible.

       

      Developed using PSoC 5LP.

      The Optimization Level was set to Speed, but in this case there was noise in the captured sensor signal.

      Noise was eliminated by setting Optimization Level to None.

      However, the current consumption has increased by 10mA.

      Is the Creator version relevant?

       

      ~Modification method~

      Project - Build Settings - ARM GCC 5.4-2016-q2-up - Compiler - Optimization - Optimization Level - Speed to None

       

      1).Is the result of operation changed by changing the optimization conditions? (Speed⇔None)

       (Customer wants to quickly investigate whether the cause is the board or the firmware)

       

      2).Is there a way to solve these without increasing the current?

       

      Best Regards

      Hayato

        • 1. Re: Effect of compiler optimization on operation
          RakshithM_16

          Hi hata_3396041,

           

          The Optimization Level was set to Speed, but in this case there was noise in the captured sensor signal.

          Can you please let us know which sensor you are referring to here? Are you referring to CapSense?

           

          Is the Creator version relevant?

          I do not think so, as this is toolchain specific. Can you share your project so that we can test it at our end? Also, which PSoC Creator version are you using?

           

          Thanks and Regards,

          Rakshith M B

          • 2. Re: Effect of compiler optimization on operation
            hata_3396041

            Hello Rakshith-san

             

            The sensor captures the accelerometer with an external AD converter and sends it to PSoC.

            It uses the PSoC SPI component to communicate with the AD converter.

             

            The version of PSoC Creator is 4.2.

             

            Best Regards

            Hayato

            • 3. Re: Effect of compiler optimization on operation
              RakshithM_16

              Hi Hayato-san,

               

              Apologies for the delay in my response. I missed your response.

              Can you please share your project? This will give us some information on the issue.

              This is my understanding so far. You are using an SPI component to communicate with an external ADC which obtains the accelerometer signal. The noise in the captured sensor signal was reduced by changing the compiler optimization but this results in a 10mA increase in current consumption. Please correct me if I am wrong.

              Can you please let me know if you are able to recreate this issue consistently?

               

              Thanks and Regards,

              Rakshith M B

              • 4. Re: Effect of compiler optimization on operation
                LePo_1062026

                Hayato,

                 

                This may be too late but here goes...

                 

                I've worked with an accelerometer before.   The manufacturer indicates that the accelerometer's ADC circuit is very sensitive (12-bit) and is prone to incoming noise due to the SPI or I2C communication.  It is also prone to noise on the VDD line.  Here are the recommendations from the accelerometer manufacturer in order of priority:

                • Make sure the accelerometer VDD lines are properly decoupled with two caps.  In my case is was a 1uF bulk cap for low frequency filtering and a 4.7nF cap for high frequency filtering.
                • Slew-rate control the communication lines.  If using SPI => SPI_CLK and SPI_MOSI.  If using I2C => I2C_CLK and I2C_DATA.    I used in-line 1.5K ohm resistors with a 10pF caps to GND at a datarate of 800Kbps.
                • Lower the communication datarate that can be tolerated.  This means the CPU will be on for longer times to complete the comm.

                 

                In your case, it might be that with optimization off the effective datarate is lowered but it takes longer and more VDD current to achieve the data acquistion.

                 

                Len

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