5 Replies Latest reply on Jul 16, 2020 7:54 AM by ApurvaS_36

    SMIF configuration issues


      Hello again here, I continue my adventure with psoc 6 mcu(cy8c624abzi-d44)  without using library. Finally I'm done with setup pll and now i have problems with smif.

      For do this I try copy all configuration settings step by step from this example https://www.cypress.com/documentation/code-examples/ce220823-psoc-6-mcu-smif-memory-write-and-read-operation

      First on clock for smif module

       (*(vu32 *)0x40260388)=1;//CLK_ROOT_SELECT2
       (*(vu32 *)0x40260388)|=(1<<4);//CLK_ROOT_SELECT2
       (*(vu32 *)0x40260388)|=(1<<31);//CLK_ROOT_SELECT2


      Second setup gpio 11

              (*(vu32 *)0x40310580)=0x000000FCu;//GPIO_PRT_OUT
             (*(vu32 *)0x403105C4)=0x6EEEE600u;//GPIO_PRT_CFG
             (*(vu32 *)0x403105C8)=0x00000000u;//GPIO_PRT_CFG_IN
             (*(vu32 *)0x403105CC)=0x00000000u;//GPIO_PRT_CFG_OUT
             (*(vu32 *)0x403105C0)=0x00000000u;//GPIO_PRT_INTR_CFG
             (*(vu32 *)0x40310598)=0x00000000u;//GPIO_PRT_INTR_MASK
             // GPIO_PRT_CFG_SIO=0x00000000u;//GPIO_PRT_CFG_SIO
             (*(vu32 *)0x403000B0)=0x11110000u;//HSIOM_PRT_PORT_SEL0
             (*(vu32 *)0x403000B4)=0x11111111u;//HSIOM_PRT_PORT_SEL1

      And finally setup Smif module

      (*(vu32 *)0x40420000)=0;//SMIF0_CTL
       (*(vu32 *)0x40420000)=(7<<16)|(1<<12);//SMIF0_CTL
      //(*(vu32 *)0x40420800)=(1<<31);//SMIF0_DEVICE0_CTL
      (*(vu32 *)0x40420000)|=SMIF_CTL_ENABLED_Msk;//SMIF0_CTL 
      (*(vu32 *)0x40420050)=(2<<16)|(1<<8)|(0x34);

      In manual i can't find register GPIO_PRT_CFG_SIO which is using in example maybe there is problem?
      or I forget about some configurations?

      I was thinking that I would see something on the mcu lines after that line but i was wrong.

      (*(vu32 *)0x40420050)=(2<<16)|(1<<8)|(0x34);


      I try copy all from example, but its still dont work, any ideas?

        • 1. Re: SMIF configuration issues



          Thank you for contacting Cypress Community.


          GPIO_PRT_CFG_SIO is the immediate next register after GPIO_PRT_CFG_OUT register. Therefore, the address should be 0x403105D0. can you please try with this register address and let us know the results?





          • 2. Re: SMIF configuration issues

            Thx for help, but add this line:

            (*(vu32 *)0x403105D0)=0x00000000u;//GPIO_PRT_CFG_SIO

            But SMIF interface still dont work and I really dont know about what I forget during configuration.

            • 3. Re: SMIF configuration issues



              Apologies for the delay.

              • Can you tell me which flash device are you using? Is it a Cypress part?
              • Are you using Quad mode commands with flash? If yes, have you enabled quad mode on the device?
              • Is it possible for you to capture the SPI signals and provide to us?




              • 4. Re: SMIF configuration issues

                Already I don't using any flash device, I olny capture SPI pins via logic analyzer(saleae logic 8) and waiting for any signal from pins but still I dont see nothing. Probably I skip something during configuration smif module(dont enable all clocks or something) idk.

                Maybe some kind protection registers?
                Also i see gpio register address on you ss dont cover with addreses from manual https://www.cypress.com/file/451841/download



                GPIO_PRT11_CFG_OUT from manual 0x403105CC
                from ss 0x40310580+0x30 =0x403105B0 ?

                • 5. Re: SMIF configuration issues



                  Thank you for your response.


                  [Q] In manual i can't find register GPIO_PRT_CFG_SIO which is using in example maybe there is problem?

                  [A] SIO is not present in any PSoC 6 devices – hence Register TRM does not talk about it. Since it is a feature that may come in future, PDL already reserves param for that.


                  [Q] GPIO_PRT11_CFG_OUT from manual 0x403105CC. From ss 0x40310580+0x30 =0x403105B0 ?

                  [A] Apologies for my mistake. I provided the screenshot for a different PSoC 6 product. For cy8c624abzi-d44 device, the offset for GPIO_PRT_CFG_OUT register is 0x4C.



                  Could you please tell me the exact steps that you are following in your project? In your first response, you have mentioned that you are not using any library and from the screenshots I can understand that you are directly accessing the registers instead of using APIs to initialize the SMIF. Can you tell me the next step that you have followed after making the above mentioned register settings? How are you sending the SPI commands to expect signals on the SPI lines? Are you using the SMIF APIs? If possible, please provide your complete project.