3 Replies Latest reply on Jun 24, 2020 11:11 PM by zapa_4702046

    I2C between 2 CCG3PA (CYPD3175-24LQXQ)

    zapa_4702046

      on one  board  i  have  two CCG3PA (CYPD3175-24LQXQ)  connect  with  I2C    with pull up resistors 2k on SDA SCL  lines 

       

      1. master

      2. slave

       

      in master  code  with PSoC creator  i choose   Serial Communication Block (SCB)  and chhose master in configuration  attached image

      in  slave  code   with PSoC Creator i choose  Serial Communication Block (SCB)    and config to slave in configuration attached image

       

      in master code  in  while  loop  i sending  three bytes to slave  but  i never success finish writing  (

       

          buffer[PACKET_SOP_POS] = 0x1;

          buffer[PACKET_CMD_POS] = 0x45;

          buffer[PACKET_EOP_POS] = 0xff;

       

       

        CyGlobalIntEnable;

      I2C_Start();;

       

          /* Start I2C write and check status*/

          I2C_I2CMasterWriteBuf(I2C_SLAVE_ADDR,buffer,3,I2C_I2C_MODE_COMPLETE_XFER);

          while((I2C_I2CMasterStatus() & I2C_I2C_MSTAT_WR_CMPLT)==0){

              UART_UartPutString("in loop\r\n"); stack here !!!

              NewLine();

          }

       

       

      in PsoC Creator  has examples  to I2C  master  and slave  individual protects  SCB    i use  basic code  from there

       

      i also  tried  use  this function  before writing to buffer (void) I2C_I2CMasterClearStatus();  but not help

       

      Q:  do i need  use EZI2C slave component  in slave project ?

      Q:  this the correct mode I2C_I2C_MODE_COMPLETE_XFER  working  when connecting two CYPD3175  boards ?

       

      Note : I have different slave device  on the same bus with different slave address working fine  any advice ?

        • 1. Re: I2C between 2 CCG3PA (CYPD3175-24LQXQ)
          ShifangZ_26

          Hi ,

           

          May I know what's response of you have been received when you said the firmware is stuck in I2C_I2C_MSTAT_WR_CMPLT. It should be good to check this status, and you could get many example code in CCGx host SDK, for example, CCG5 notebook design, the NCP81239 is controlled by I2C master of CCG5.

           

          A: If you could like to use EZI2C, the operation will became easier to use, since the write and read of EZI2C is FIFO/Buffer write and read.

          B: If you are using uint32 SCB_I2CMasterWriteBuf(uint32 slaveAddress, uint8 * wrData, uint32 cnt, uint32 mode), the mode you can fill with I2C_MODE_COMPLETE_XFER.

           

          CCGx support multi salve mode.

           

          Best Regards,

          Lisa

          • 2. Re: I2C between 2 CCG3PA (CYPD3175-24LQXQ)
            zapa_4702046

            i solve  the issue   from slave side   define  buffer for slave before I2S_Start() need define after

             

               I2CS_Start();

                I2CS_I2CSlaveInitReadBuf (i2cReadBuffer,  BUFFER_SIZE);

                I2CS_I2CSlaveInitWriteBuf(i2cWriteBuffer, BUFFER_SIZE);

             

            thank i will download  the EZ-PD™ Host Software Development Kit and lookup the example

            • 3. Re: I2C between 2 CCG3PA (CYPD3175-24LQXQ)
              zapa_4702046

              could  give scrrenshot where i could find this example CCG5 notebook design, the NCP81239 is controlled by I2C master of CCG5.  i am  download host sdk  but  i dont see this example

              Screenshot 2020-06-25 09.11.01.png