Can you please elaborate more about, "My camera is that the last Hsync is low and Vsync is low at the same time, Vsync is high and the first Hsync is high at the same time. Hsync and Vsync all is that high active." ?
The FW_TRG is used by the firmware to trigger a software interrupt to the GPIF state machine to give the control back to the GPIF state machine.
In the FULL_BUF_IN_SCK or PARTIAL_BUF_IN_SCK, there is an INTR_CPU action which causes the control to transfer to the firmware to handle the header addition and the partial buffer wrapup (in case of PARTIAL_BUF_IN_SCK) stage.
Once these actions are completed, the firmware triggers an interrupt to the GPIF state machine using CyU3PGpifControlSWInput() API by firstly setting it to CyTrue (FW_TRG is asserted) to make the transition to FRAME_END_SCK state in the state machine and then setting the API to CyFalse (FW_TRG is de-asserted) to transition to IDLE_SCK state to take care of the next incoming frame.