I just wanted to write a succinct summary of what is needed to create a bootloader for the BLE SoCs over SPI in the hope that it helps other people who might struggle with the lack of documentation. Really, this is for the CYW20736S, but I think would likely work for other similar devices. This all follows from the thread below:
The first thing to say is that this is not a difficult thing to implement and you should not be put off by some of the advice in the thread above. If you start with the uart_firmware_upgrade project as outlined in the thread above, it is straightforward.
The important things to be aware of are as follows:
- On the CYW20736S although the executable code is stored in EEPROM, it runs out of RAM.
- The EEPROM can be split into multiple sections so that a new, incoming message can be stored in one area of EEPROM, while the code that is executing from RAM was copied from a different area of EEPROM at boot.
- The point above means that as new image is downloading it is stored in the "inactive" area of EEPROM.
- Once the new image has finished downloading and is verified as being correct [with a CRC], one of the areas of EEPROM that keeps track of the active area of EEPROM used for executable code is updated. This gives you a kind of pair of virtual planes.
If you use SPI to reproduce the functions in ws_upgrade_uart.c, in the uart_formware_upgrade project, you can call all the functions in ws_upgrade.c that the uart method calls and it just works.
It's also a very good idea to look in the peerapps/Windows/WsUartFu directory at the readme.txt file as it gives you a very basic bit of documentation about the protocol. It's as good as you're going to get and if you're writing code for the BLE, you'll likely understand how the WsUartFu.cpp creates the CRC for the whole file.
I modified the way the CRC is created and reproduced to reduce the footprint the bootloader was taking up. You don't have to use the Cypress way of doing the CRC as long as you mod what you use at both ends. ie You create and read the CRC with the sane method.
It should probably be stressed that the CYW20736S has internal EEPROM. Flash/EEPROM is liberally interchanged in the the thread above and it gets confusing. Some of these devices use extrnal EEPROM or external flash from what I can gather. Some, like the CYW20736S, have internal EEPROM.