1 Reply Latest reply on Jun 9, 2020 4:29 AM by ApurvaS_36

    S25FS model, QUAD MODE bit on POR(Power on Reset) without any write reg execution

    mich_4716756

      Hello,

       

      Is there any method to set CR1[1] = 1b'1 by default without any write_reg?

      We're thinking of both a QUAD read based controller and a NOR flash on POR(Power on Reset). On SPI controller side, we make the controller boot-up with ECh read-opcode.But, recently we found out we need to set some configuration to FLASH with WREN, WRR before quad read execution.

       

      So, we're looking for some method to set QUAD mode bit in CR1 by H/W default.

       

      Thanks

        • 1. Re: S25FS model, QUAD MODE bit on POR(Power on Reset) without any write reg execution
          ApurvaS_36

          Hi,

           

          Thank you for contacting Cypress Community.

          I would like to inform you that all flash devices are shipped with Quad mode disabled and unfortunately there is no other way of enabling the Quad mode apart from performing a write operation on configuration register. However, I would like to point out that the CR1NV register is a non volatile register and CR1NV[1] bit (QUAD_NV bit) provides the default state for the Quad bit upon power on. Therefore, once the CR1NV[1] bit is programmed to 1, the write operation on Configuration Register is not needed to be performed upon every power on.

          Let me know if you have any more queries.

           

          Regards,

          Apurva