The SAR input resistance is 2.2K ohms. This means when the SAR is sequencing to Battery input, it will draw about 3/2.2K = 1.4mA when sampling this input. Therefore, minimize when this input is read.
You have the VDDA as your reference source. I'm assuming that Battery is the source of VDDA. This means that your ADC measurement will be at or near the maximum ADC count. This is because the input is a ratio of your Vref. Since VDDA = Battery then (input/VDDA)*((1<<12)-1) = (Battery/Battery)*(4095) = 4095.
To avoid this, use a Bandgap Vref as your reference. This will be mostly immune to changes in VDDA.
There is a Low Voltage Detect (LVD) circuit in the PSoC. This circuit is basically a comparator with a selectable voltage threshold. It is intended to quickly (because it is constantly on) detect if VDDD drops below the set threshold. The result can be polled or an interrupt can be launched if VDDD drops below the selected threshold.
This circuit is constantly ON and the input resistance is ~1M ohms or higher. Will the LVD work better for you?