1 Reply Latest reply on Jun 4, 2020 1:20 PM by DheerajK_81

    About the Address Length of EMIF

    SaPa_4651386

      I'm trying to control Wiznet W5300 (Parallel to Ethernet Chipset) using EMIF.

       

      This chip  use address line 10 bits and memory that uses Little Endian.

       

      I have two issues now.

       

      1. I couldn't find a way to adjust the timing of EMIF.

       

      https://www.wiznet.io/wp-content/uploads/wiznethome/Chip/W5300/Documents/W5300_DS_V134E.pdf

      (Page 124 ~ 125. Register Read, WRITE Timing)

       

           How can I adjust the timing of EMIF?

       

      2. about address line designation cannot be specified only as a multiple of 8.

       

           Do I need to use 16 bits to use the address of EMIF as 10 bits?

       

      Thank you for reading it and let me know if you know what this is about.

        • 1. Re: About the Address Length of EMIF
          DheerajK_81

          How can I adjust the timing of EMIF?

          There is no direct option in the EMIF Component Configurator to set the Write and Read cycle lengths. It is derived from the Bus Clock Frequency. Based on the number of cycles required for each write and read, you can see the time displayed as shown below:

          Can you please let me know which PSoC5 device you are referring to here? Based on the device, you can try different clock configurations to see what works best for you. From the datasheet I see that you need a minimum read time of 65ns. So, adjust the bus clock accordingly in the DWR tab to get this.

           

          Do I need to use 16 bits to use the address of EMIF as 10 bits?

          Yes, it accepts only multiples of 8. So, you can use 16-bits and leave the unused bits as floating or connected to ground. 

           

          Regards,

          Dheeraj