How can I adjust the timing of EMIF?
There is no direct option in the EMIF Component Configurator to set the Write and Read cycle lengths. It is derived from the Bus Clock Frequency. Based on the number of cycles required for each write and read, you can see the time displayed as shown below:
Can you please let me know which PSoC5 device you are referring to here? Based on the device, you can try different clock configurations to see what works best for you. From the datasheet I see that you need a minimum read time of 65ns. So, adjust the bus clock accordingly in the DWR tab to get this.
Do I need to use 16 bits to use the address of EMIF as 10 bits?
Yes, it accepts only multiples of 8. So, you can use 16-bits and leave the unused bits as floating or connected to ground.