SCL clock frequency for CY65634-48AXC

[NoAr_1540581]

Hello

In the above table, "SCL clock frequency" is divided by voltage. But, is this difference in voltage range correct with the recognition that "Internal regulator" and "single power supply 5 V required" are different?

Best Regards

Arai

[Sananya_14]

Hello Arai-san,

Could you please attach the table again as it is not currently visible? If you are referring to AC characteristics of I2C EEPROM interface, would you like to know if it depends on whether we use an external regulator or internal regulator for 3.3V?

Best Regards,

Sananya

[NoAr_1540581]

Hello Sananya san

I'm sorry . I will attach the table.It is described datasheet on page 21, and the title is "AC Characteristics of I2C EEPROM Interface"

Best Regards

Arai

[Sananya_14]

Hello Arai-san,

Thanks for the update. The characteristics should not depend on whether we provide 3.3V from external supply or using 5V to the internal regulator.

Best Regards,
Sananya

[NoAr_1540581]

Hello Sananya san

Could you please explain the reason why it is divided into "1.8 V–5.5 V" and  "2.5 V–5.5 V"?

Best Regards,

Arai

[Sananya_14 · Accepted solution]

Hello Arai-san,

This is basically chip architecture related,speed of the logic design based on the supply voltage.

Please refer to datasheet from the Atmel or Microchip which has similar design.

Best Regards,

Sananya