Please find the below KBA for more information on this topic.
Your results indicate that the memory may be not able to configure itself properly as the data is not corrupted and the general reasoning for this is power supply issues.
Your settings seems to be fine. Can you please answer our below queries
1) How many devices are showing these behavior.
2) What are the steps you are following to test the memory devices ( testing procedure).
3) Can you provide the top marking for one of the device showing this behavior.
4) Can you share the schematics of the FRAM section with us
I see now that I interpreted the rise and fall time specs as maximums rather than minimums. I am now confident that the possible problem is not power supply related.
At the moment testing is slow, as I have to manually cycle the power to check that the memory read is correct. I will continue to test and will report back to you if I see any problems.
The application is fitted with a power fail interrupt to give time to store data to the FRAMs before the power fails.
Is there any advantage in placing the FRAMs in sleep mode before the power fails? After the last write, the chip select goes high, so the memory should be write protected anyway.
Attached part schematic for your information.(note 23LC1024 are replaced by CY15B104Q for non volatile memory option)