5 Replies Latest reply on Jun 1, 2020 1:42 AM by ShipingW_81

    About PSOC63 UDB?

    RoPe_2386886

      Hi Sir,

      I have some question want to ask next,

        (1)PSoC6 UDB part concrete can do?

      (2)what is the difference between it and CPLD or relationship, as well as the specific usage, as well as the specific how many resources, whether can realize a little more complicated point of application, to do some algorithm, its peaceful LUT lookup table of commonly used exactly is what relationship, if we can develop a serial port?

      (3)Whether UDB can do sequential logic?

      Thanks

      Paddy

       

        • 1. Re: About PSOC63 UDB?
          LePo_1062026

          Paddy,

           

          I'm not a Cypress rep but I can answer some of your questions.

           

          Not all PSoC6 parts have UDBs.  There are only 27 PSoC6s that have 12 UDBs each at this time.

           

          The UDBs can be configured using a schematic capture tool provided by Cypress with the PSoC Creator IDE.  With it you can create very complex logic using logic elements (AND, OR, NOT, XOR, etc gates).  There are pre-defined components that use UDBs that can also be called on in the schematic capture.

           

          If you are familiar with Verilog, you can use it to define these UDBs.

           

          Note:  ModusToolbox IDE provided by Cypress does not have a schematic capture tool and is a bit limited in accessing the UDB resources of the PSoC6 devices that have them.

           

          All the PSoC6s have a number of fixed function blocks to handle standard timer, counter, PWM functions, UART, I2C, SPI communication functions.  Many also have Capsense, ADCs, DACs, and other fixed function blocks.

           

          If you are interested in creating your own serial port logic you can with PSoC Creator and the UDBs.

           

          Len

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          • 2. Re: About PSOC63 UDB?
            XiaoweiZ_71

            UDB 的架构比常规 PLD 要优化,UDB 模块除了包含 PLD 资源还拥有 Microcell (可配 DFF),Datapath(加/减/移位数学运算),Control/Status Register(UDB 与 CPU 接口)等资源,PSoC 3/5  Creator 工程中绝大多数的数字资源模块(I2C/SPI/UART/Timer/Counter/ShiftRegister等)都是基于 UDB 开发的。所以无论是组合逻辑、时序逻辑、LUT、Verilog-Based Custom logic, UDB 资源都可以设计。你可以参考一下几个文档来了解 UDB 的特性,这几篇文档涵盖了 UDB 开发的常规和典型应用,后面两篇文档更是详细介绍了如何创建自己的 verilog 组件。

             

            AN62510 - Implementing State Machines with PSoC® 3, PSoC 4, and PSoC 5LP

            AN82156 - PSoC® 3, PSoC 4, and PSoC 5LP - Designing PSoC Creator™ Components With UDB Datapaths

            AN82250 - PSoC Creator - Implementing Programmable Logic Designs with Verilog

            Just Enough Verilog for PSoC® - KBA86336

             

            如果你需要更细化的分析,那么需要你先描述清楚你要实现什么的逻辑,然后我们再给你具体的建议。

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            • 3. Re: About PSOC63 UDB?
              RoPe_2386886

              Hi len,

              Thank you for your reply.

              • 4. Re: About PSOC63 UDB?
                RoPe_2386886

                Hi Xiaowei

                感谢您的回复,

                (1)主要用于信号的整形以及滤波处理,

                (2)主要是想把EPM240替换掉,Les  240个全用了。CY是否有大于192的宏单元PSOC型号?文档主要介绍了PSOC3\PSOC4\PSOC5LP,并没有介绍PSOC6的宏单元个数,PSOC6有12个UDB,每个UDB对应8个宏单元,也就是PSOC6最多就是96个宏单元个数吗?具体192个宏单元对应CY的哪个型号,谢谢。

                 

                • 5. Re: About PSOC63 UDB?
                  ShipingW_81

                  是的,PSoC 6都是统一的96个宏单元,PSoC 3/5都有部分型号拥有192个宏单元,具体可以查阅各自datasheet,或者在PSoC Creator的Device Selector中查找。