The first point is valid when you are using the SPI block in slave configuration. The second point is valid for master mode. In master mode, the API works as a high level API that writes data/ dummy bytes to the slave, waits for the transfer to get completed and then reads the data from the RX FIFO.
Thanks for responding. Unfortunately, I'm now more confused than before. You say the so-labeled "low-level API" is actually a high-level API? This makes no sense to me.
I've experimented by calling Cy_SCB_SPI_ReadArray() without first calling Cy_SCB_SPI_WriteArrayBlocking(), and no activity occurs on the SPI bus.
Can you tell me how I can use the SPI PDL to send data to a slave device and collect the data returned during that same transaction?
After thorough testing, I can say definitively that the PDL does NOT behave the way you suggested. Calling Cy_SCB_SPI_ReadArray() does nothing but read data from the SPI RX FIFO. It does not write to the TX FIFO. The documentation is, as I suspected, just wrong.