When MISO is enabled, the oversampling factor can be between 4 to 16. The desired output frequency depends on the input clock source to the SCB block and the oversampling factor. ie desired SPI freq = SCB Clk freq/ Oversampling.
To achieve 25 Mbps with minimum allowable oversampling of 4, set the input clk_peri to 100 MHz (25 x 4) as shown using clock configurator:
Thanks that helpedmI had to do that and also I edited the HF clock that feeds CLK_Peri it had HF clock was set to 50 it is now 100 and oversample 4 sets spi clock to 25Mhz! yay. FYI local clocks (perifrials) cannot be edited they are grayed out. only the upper clocks (currently in yellow) can be edited.
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