5 Replies Latest reply on May 21, 2020 5:11 AM by brsi_1319346

    Trouble achieving low power on 4100S Plus (CY8C4127AZI-S445)

    brsi_1319346

      Hello All,

       

      I'm new to 4100s plus. I'm trying to achieve a 'storage' mode for a battery powered application. It's a very simple circuit from a CR2032, a sensor and a couple of LEDs.

       

      I've got the consumption at between 1..2mA and I'm disappointed. My expectations were <100uA and the datasheet seems to indicate this is possible.

       

      The application is in deepsleep for 30 seconds at a time, then wakes to check the sensor @ 1mA for 270ms. My CR2032 is flat in 10 days at the moment.

       

      I'm using the Capsense Low power example as a starting point and it uses the WDT interrupt to wake from deep sleep. Capsense is turned off, was removed from project, not needed.

       

      Any thoughts?

       

      What is the 4100S plus family capable of?

       

      Project is attached. Readable, but it's a mess, still need giant cleanup before going to client. Don't judge me.

       

      Thanks,

      Brent.

        • 1. Re: Trouble achieving low power on 4100S Plus (CY8C4127AZI-S445)
          GaneshD_41

          Hi,

           

          Here are some tips to reduce power consumption further.

           

          1. Increase the Sysclk and HFclk dividers as much as possible until the performance of your application doesn't change. Clocks.PNG

          2.  Please go through the application note "PSoC 4 Low power modes and Power reduction techniques" from the link below. Please ensure that you have followed all the points menioned in the application note wherever possible.

           

          https://www.cypress.com/file/121271/download

           

          3. Please select the Debug mode as GPIO in the clocks tab.

           

          dwr.PNG

           

          4. Remove the entire code and put the device to deep sleep and meaure the current. This value should align with datasheet spec. Then introduce WDT and wake-up sequence (for every 30 seconds and measure the power consumption). Developing the project step by step like this helps you to find which is causing the power consumption high.

           

          5. Instead of sing SW_Tx_UART, we recommend you to use fixed function UART block. You can find the relavant code examples from PSoC Creator itself. This will reduce the power consumption.

           

          Kindly apply the above changes and update us the new power numbers. If the value is still high we will provide you further comments.

          Thanks

          Ganesh

          • 2. Re: Trouble achieving low power on 4100S Plus (CY8C4127AZI-S445)
            brsi_1319346

            Ganesh, thanks for the solid suggestions. I'll make these checks and changes and then I'll let you know what was the actual cause for feedback.

             

            Cheers,

            Brent.

            • 3. Re: Trouble achieving low power on 4100S Plus (CY8C4127AZI-S445)
              brsi_1319346

              Ok, so just to be sure: there is NO hibernate mode in 4100S Plus?

               

              Steps 1,3,4,5 made zero difference. Going through the Low Power Mode and Reduction Techniques Now.

               

              I also have a CY8CKIT-149 that I will test the code on to see what I get in DeepSleep.

              • 4. Re: Trouble achieving low power on 4100S Plus (CY8C4127AZI-S445)
                brsi_1319346

                I had some success, reduced the consumption from 1.5mA to 420uA. I have 9 LEDs, and they are active low, drive from the PSOC. They had pin drive mode 'Open Drain Drives Low'. Changing to Strong Drive reduced the power by 1.1mA.

                 

                Then changing the drive to High Impedance Digital pushes the consumption up to 1.9mA.... ?

                • 5. Re: Trouble achieving low power on 4100S Plus (CY8C4127AZI-S445)
                  brsi_1319346

                  Ok, so the other things that really caught me out was point #3 about setting Debug Select to GPIO.

                   

                  After correcting the issue with my LEDs leaking into the PSOC IO, I put Debug Select back to SWD for convenience. Big mistake. After a few more hours I tested a feature, and power grown by 1mA. I spent a LOT of time backtracking until finally going back to GPIO mode and the power is back to measurably low.

                   

                  So fixing the LED leaking, or Debug mode alone did not fix my consumption. Required both to be fixed. Really obscure and I'm thinking I'll go back to 4200 as my go to Psoc family. 4100S Plus not fun so far.