1 2 Previous Next 16 Replies Latest reply on Jun 1, 2020 10:29 PM by TAKA_2056991

    FX3 GPIF MASTER operation

    TAKA_2056991

      Hello

       

      I want to write Wrap addresses from 0 to 3 with FX3 master.

      However, the address and data are out of sync.

      I want to synchronize address and data.

      The state machine starting from W4_0 is selected.

      I think it's because of the GPIF2 sketch.

      DMA_RDY_TH3 from W4_5 to W4_1 seems to stay High, but is there any way to improve it?

        • 1. Re: FX3 GPIF MASTER operation
          RashiV_61

          Hello,

           

          Please let me know more about the application.

           

          I understand that master is writing to slave i.e. starting from W4_0.

          Please let me know the DMA channel configuration on the master side. I want to know the DMA buffer size, the channel's producer and consumer socket.

           

           

          I want to write Wrap addresses from 0 to 3 with FX3 master. I want to synchronize the address and data.

          >> Please let me know how exactly you need to synchronize the address and data. Can you tell what sequence do you need for address lines and how much data needs to be sent for that address?

           

          From the state machine you shared, the address counter's value is driven in the state W4_1

          addr.PNG

          And the address counter is initialized to 5 as the initial value. Please let me know the reason for this.

           

           

          DMA_RDY_TH3 from W4_5 to W4_1 seems to stay High, but is there any way to improve it?

          When socket 3 of GPIF is configured as Consumer, the DMA_RDY_TH3 signal will be high when the DMA buffer is ready to be consumed (i.e. FULL) and as soon as the DMa buffer is consumed (i.e DMA buffer is empty) the DMA_RDY_TH3  will be going low.

           

          Regards,

          Rashi

           

           

          • 2. Re: FX3 GPIF MASTER operation
            TAKA_2056991

            Hi,

             

            I'll attach the application of PC and FX3.

             

            >> Please let me know how exactly you need to synchronize the address and data. Can you tell what sequence do you need for address lines and how much data needs to be sent for that address?

             

            The write destination is a register in the FPGA.

            The address and data need to be fixed by the rise of WEN.

            If 16-bit data is written from address 0 to 3 in order, it will be taken in as 64-bit.

            Write a large amount of data by repeating as many times as necessary.

             

            >>From the state machine you shared, the address counter's value is driven in the state W4_1 And the address counter is initialized to 5 as the initial value. Please let me know the reason for this.

             

            For writing, select from the PC depending on the purpose and what to write while wrapping the address and writing only 16 bits.

            sorry. The initial value of 5 for the address counter is a mistake of 0.

             

            Regards,

            Takao

            • 3. Re: FX3 GPIF MASTER operation
              RashiV_61

              Hello Takao-san,

               

              Please let me know what is the data that is being sent from the host application. Is it possible to send incrementing data sequence like 1,2,3..and so on (16 bits each). This is just for debugging. We need to know what is the data that is sent from host through USB to FX3.

               

              In the previous response, you mentioned that there is no sync between data and address, this can be due to the same data is being sent multiple times from the host (i.e. in the DMA buffer) and whenever DR_DATA is called the same data is sent.

               

              I have designed GPIF state machine with the functionality as mentioned by you. Please test this GPIF state machine in your application and let me know the results.

               

              I have kept the Data_Count limit to 512 (i.e. 0-511) as DMA buffer size is 1024 bytes and 16 bits per transfer (2 bytes) so if the 2 bytes data is sent 512 times data count will hit.

              The Addr_Count is set 0-3 (it will reload after address count hits)

               

              Please find the attached GPIF state machine and let me know the results after testing

               

              Regards,

              Rashi

              • 4. Re: FX3 GPIF MASTER operation
                TAKA_2056991

                Hello Rashi,

                 

                >>Please let me know what is the data that is being sent from the host application. Is it possible to send incrementing data sequence like 1,2,3..and so on (16 bits each).

                 

                Yes, I made the data to increment.

                The data incremented by 16 bits is transmitted 1024 bytes for 512 times.

                 

                I tried the New GPIF state machine. But it still works a little wrong.

                There is a gap between CSN and WEN, and the data is slightly off.

                 

                Although it is the attached GPIF, the thread number of DR_DATA was thread 0, so I changed it to thread 3.

                If it stays at zero, the data doesn't change.

                • 5. Re: FX3 GPIF MASTER operation
                  RashiV_61

                  Hello Takao-san,

                   

                  There is a gap between CSN and WEN, and the data is slightly off.

                  >> I have modified the GPIF state machine again. Please check and share the results.

                   

                  DR_DATA settings had to be changed to Tread 3 as Socket 3 is the Consumer socket.

                  gpif_sm.PNG

                   

                  Regards,

                  Rashi

                  • 6. Re: FX3 GPIF MASTER operation
                    TAKA_2056991

                    Hello Rashi

                     

                    The data doesn't change.

                    I think it's because it doesn't check for deletions from the data source.

                    The address and CEN and WEN are also different.

                     

                    Since the logic analyzer's sampling limit is 10 ns, I think there are times when I cannot get it at 100 MHz.

                    So I would like to slow down the clock a little, but if I change it around here?

                     

                    -------------------------------------

                     

                    clkCfg.setSysClk400 = CyTrue;   /* FX3 device's master clock is set to a frequency > 400 MHz */

                    clkCfg.cpuClkDiv = 2;           /* CPU clock divider */

                    clkCfg.dmaClkDiv = 2;           /* DMA clock divider */

                    clkCfg.mmioClkDiv = 2;          /* MMIO clock divider */

                    clkCfg.useStandbyClk = CyFalse; /* device has no 32KHz clock supplied */

                    clkCfg.clkSrc = CY_U3P_SYS_CLK; /* Clock source for a peripheral block  */

                     

                    /* Init the GPIO module */

                    gpioClock.fastClkDiv = 2;

                    gpioClock.slowClkDiv = 0;

                    gpioClock.simpleDiv = CY_U3P_GPIO_SIMPLE_DIV_BY_2;

                    gpioClock.clkSrc = CY_U3P_SYS_CLK;

                    gpioClock.halfDiv = 0;

                     

                    /* TODO: Change the clkDiv value. Increasing the value will reduce the clock

                    * frequency*/

                    pibClock.clkDiv = 2;

                    pibClock.clkSrc = CY_U3P_SYS_CLK;

                    pibClock.isHalfDiv = CyFalse;

                    pibClock.isDllEnable = CyTrue;

                     

                    -------------------------------------

                     

                    With this setting, GPIF operates at 100MHz.

                    Isn't the combination of DMA and PIB clock wrong?

                     

                    Is it possible to write / read at 100MHz when sending from a PC to GPIF?

                     

                    Regards,

                    Rashi

                    • 7. Re: FX3 GPIF MASTER operation
                      RashiV_61

                      Hello Takao-san,

                       

                      From the GPIF state machine that you shared, the GPIF is in the asynchronous mode because of which the writing to FPGA will be irrespective of the clock signal

                      async.PNG

                      From the clock settings you shared, the System Clock  is 403.2 MHz and the GPIF/PIB clock is configured to ~ 200 MHz

                      pibClock.clkDiv = 2; // 403.2 / 2 = 201 MHz

                      pibClock.clkSrc = CY_U3P_SYS_CLK; // 403.2 MHz

                       

                      DMA clock is also configured for 200 MHz

                      clkCfg.setSysClk400 = CyTrue;  /* FX3 device's master clock is set to a frequency > 400 MHz */

                      clkCfg.cpuClkDiv = 2;          /* CPU clock divider */

                      clkCfg.dmaClkDiv = 2;          /* DMA clock divider */

                       

                      To reduce the PIB clock the divider pibClock.clkDiv value can be increased. The min value is 2 and the maximum value is 1024.

                       

                      If the data from the USB is sent too fast and then the consumption from the GPIF, there will be DMA buffer overflow. To avoid this DMA buffer size can be increased and DMA buffer count can be set accordingly. Note: On changing buffer size LD_Data_Count value will also be changed accordingly in the GPIF state machine.

                       

                       

                      I have modified the GPIF state machine again. Apologies for too many versions of the state machine as I am not having enough hardware to test the state machine. Please test the state machine and let me know the results.

                       

                       

                      Regards,

                      Rashi

                      • 8. Re: FX3 GPIF MASTER operation
                        TAKA_2056991

                        Hello, Rashi

                         

                        Thank you.

                        The address is now Wrapped and output.

                         

                        But I still have a problem.

                        If you use the USB Control Center when sending from a PC, the data will come out every address. Please see the attached 0.png.

                        However, the first data 0xAA is output for only one clock.

                        Please see the attached 1.png.

                        For the transmitted data, see USB Control Centor.png.

                         

                        On the other hand, in the PC program I created, the data change is not in time for the address like the attached 2.png, 3.png.

                         

                        I am using the following API, is it wrong?

                        bool status = BulkOutEp-> XferData (buf, xlen);

                        • 9. Re: FX3 GPIF MASTER operation
                          RashiV_61

                          Hello Takao-san,

                           

                          Thank you for the update.

                           

                          I am using the following API, is it wrong?

                          >> No, the API is not wrong. The same API is being used in Control Center while transferring a  file.

                           

                          It seems that the data sent (buffer) using XferData API is not as expected.  Can you check the data by printing the first few elements of the buffer which is passed in XferData API.

                           

                          Regards,

                          Rashi

                          • 10. Re: FX3 GPIF MASTER operation
                            TAKA_2056991

                            Hello Rashi,

                             

                            I understand the right thing with the XferData API.

                            Lost of the top data was eliminated by adding and adjusting GPIF State, Action, and delay.

                            When sending with USB Control Centor, data comes out at every address, but it does not come out if it is a HostPC program I created.

                            The only difference is the program difference on the PC side.

                            Since the code of USB Control Centor is C #, I tried using C ++ bulkloop and Streamer, but the situation does not change.

                            Since 16 CSNs change the data, I think 16 is related. I set the burst length to 16 but it didn't matter.

                            Do you have to send it immediately depending on the size of len specified in the XferData API?

                            • 11. Re: FX3 GPIF MASTER operation
                              RashiV_61

                              Hello Takao san,

                               

                              Can you send 16384 bytes of data from the custom host application as done with the control center and let me know the results

                               

                              Regards,

                              Rashi

                              • 12. Re: FX3 GPIF MASTER operation
                                TAKA_2056991

                                Hello Rashi,

                                 

                                I changed the number of transmissions to 16384 and transmitted with XferData, but it does not improve.

                                On the contrary, even if you change Byte to transfer from 16384 to 1024 at the control center, this will be the expected transmission.

                                 

                                Regards,

                                Takao

                                • 13. Re: FX3 GPIF MASTER operation
                                  RashiV_61

                                  Hello Takao san,

                                   

                                  To confirm whether the problem is with the host application or the firmware, please display/print the data, sent through XferData in the custom host application, as done in the control center.

                                   

                                  Regards,

                                  Rashi

                                  • 14. Re: FX3 GPIF MASTER operation
                                    TAKA_2056991

                                    Hello Rashi,

                                     

                                    After reviewing the transmission data of XferData, the output was the same as the control center.

                                    Thank you. I really appreciate your help.

                                     

                                    I still have some readings, but I will try my best here.

                                     

                                    Best Regards,

                                    Takao

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