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Please refer to section 5.3 of AN76405 application which mentions the changes needed in the image files when using I2C EEPROM (24LC1026). Please refer to important notes and section 5.2.1
The addressing for the Microchip EEPROM 24LC1026 is different from the addressing of other 128-KB Microchip EEPROMs. If using Microchip EEPROM 24LC1026, the I 2C EEPROM size field, for example, bImageCTL[3:1], should be set to 6. Please confirm that these changes are done.
Or what type of EEPROM can be used? My image is almost 128 kB.
As you are using EEPROM of 128 KB and image size is also 128 KB, it is recommended to use the firmware image built in Release mode, as the size of the generated image file in the Release version is smaller than that in the Debug version.
Thank you, the Application Note helped to understand what happens.
Previously I used the bImageCTL[3:1] = 6 default value for programming the 24LC1026 EEPROM, but that did not work either. Then I tried to change the bits to 7, and the error remained. There is an FPGA module in a socket on my board, and when I removed it from the socket, and used the bImageCTL[3:1] = 6 settings, the EEPROM programming became succesful. Then I checked the FPGA module's schematic, and found out that the Real-Time Clock IC has an I2C address of 0xA2. So there is an address conflict between this IC and the boot EEPROM. I tried configuring the EEPROM's address to 0xA4, but it still did not help. Probably the bootloader finds a device at I2C address 0xA2, and thinks that is an EEPROM. Anyway, it is not really necessary to connect the FPGA's I2C bus to the boot EEPROM. I cut it, and now everything works fine.
Thank you for the update. We are glad to hear that the problem got resolved.