1 Reply Latest reply on Apr 28, 2020 6:19 AM by ApurvaS_36

    S25FL127SABMFI100 设置修改

    flfa_1363056

      Hi.cypress

      客户在使用S25FL127SABMFI100 做uboot在flash中存放的地址块是0x00000000-0x00080000,目的想通过修改bootcmd变成空值(该空值是客户需要并且程序能运行)。在修改之前读取该系统值为:boota。进行修改见附件第一步操作;运行第二步保存变量并且断,上电操作;再到第三步,读取bootcmd时,不是空值却又恢复了默认值(boota),如再次对该值进行赋值又回到第一步。问题:如何在该区域下进行赋值并能保留该值呢?

        • 1. Re: S25FL127SABMFI100 设置修改
          ApurvaS_36

          Hi,

           

          Please refer to the following solutions :

           

          • If you cleared the boot environment and leave it empty, which the gd->env_valid = 0 during the env_init(function for initializing environment from NOR flash (if you correctly open the Macro CONFIG_ENV_IS_IN_NOR), it indeed will use the default environment according to the u-boot implementation:

          if (gd->env_valid == 0) {
          #if defined(CONFIG_GTH) || defined(CONFIG_ENV_IS_NOWHERE) /* Environment not changable */
             puts ("Using default environment\n\n");
          #else
             puts ("*** Warning - bad CRC, using default environment\n\n");
             show_boot_progress (-60);
          #endif
             set_default_env();
          }
          else {
             env_relocate_spec ();
          }

          Please set env the valid environment and save env to make sure the flash have valid information.

           

          • If you save env with valid environment but still have the issue, please use the uboot command (sf) to read the flash address directly to double check whether the data was stored on flash, if the data saved on flash is not correct or not saved, try to see whether the sf command can erase/program the flash, if sf command still cannot work, it probably caused by the incorrect driver of SPI NOR flash (incorrect page size, write buffer size, or incorrect sector erase program command or mismatched configuration) in u-boot.

           

          • If you set the Block Protection on flash, it’ll also write protected some area from erase/program again, please read the SR1 out to see the BP[2:0] configurations:

          3.jpg

           

          4.jpg

           

          Regards,

          Apurva