2 Replies Latest reply on Apr 12, 2020 9:05 PM by KrPh_4682611

    CY7C1041G30-10ZSXI SRAM part termination requirements for Address and data lines

    KrPh_4682611

      HI,

       

      I am using CY7C1041G30-10ZSXI SRAM  which is interfaced with microsemi samrt fusion 2 FPGA. In interfacing the part to FPGA, I am not sure any kind of termination (like series resistor, as of now no terminations are considered as it cmos output and inputs) is required here to reduce the reflection between the device other than length matching (+/-10mils in FR4 board) and impedance (50+/-10%) control in PCB. Maximum operating frequency considered as 100MHz

       

      Kindly recommend any terminations are to be considered for this particular interface and let me know if any other considerations to be taken for reducing the reflection.