First of all, thank you very much for your quick response.
The thread you remit does not answer particularly our question.
If I follow CX3 datasheet recommendation, I would never force a delay in the VDDIO1 due to, rigurosly, <=10ms means that 0ms is also right. In other words. VDDIO1 could be raised up next to the other voltage rails, altogether.
However, in the DENEBOLA there is a Soft Start deliverately placed to in fact, DELAY the ramp of this voltage rail.
As they are clearly contradictory, here we posted our own question. And let me tell it is not about "understanding correctly" (as your answer to Eric in the other thread), is about incoherence between CX3 documentation and eConSystem schematics.
We just want to proceed in the correct way to have the most dependable product in the market. Even when DENEBOLA is a great reference, it can present errors that could be solved in our instance and not only copy the schematic, but also try to improve it solving potential mistakes.
"Working" is not enough for us, it must last in the time, quality design is one of our pilar. A large customer is awaiting for our bridge and we are trying to make the best.
Thank you so much again for your incredible fast response time.
You can follow the CX3 datasheet recommendation.
Regarding the Denebola kit we will check this with our design partner - econ systems.