11 Replies Latest reply on May 22, 2020 6:23 AM by RiCh_4680461

    CX3, MIPI 720Mbps per lane, MAX GPIF Clock Rate

    RiCh_4680461

      Hi Sir,

       

      i am trying to bringup a sensor, which having following spec.

       

      1. 720Mbps data rate per lane, 2 lanes.

      2. mipi lane count: 2 lanes

      3. sensor resolution: 1280x480

      4. fps:  120fps

      5. RAW12.

       

       

      the sensor's clocking cannot be adjustable, i keep it as what it is. trying to configure CX3 parameters.

       

      1. clock divider

      2. fifo delay

      3. multipiler

      4. pixclk

       

       

      after trial and error for a week, i figured it out, that PIXCLK has to be more than 108MHz in order to get correct image streaming.

       

      2 questions:

       

      1. Is 108MHz PIXCLK ok?  as spec said the max GPIF clock is up to 100MHz.

      2.  i attached my cx3 configuration for your comment seeking for better settings possible reducing pixclk rate to be below 100MHz..configuration.png