2 Replies Latest reply on Apr 6, 2020 6:45 PM by MoTa_728816

    Official WLCSP-35 Footprint?


      I downloaded the official PSoC 4200 PCB footprint libraries for Allegro, Altium, and Pads and there does not seem to be an official footprint for the WLCSP 35-ball package (the FN package). I have the 4200 family datasheet (001-87197 Rev. *J), and there is a drawing of the package on page 38, but no corresponding footprint specification. I have read JEDEC Design Guide 4.18 per the instructions in the datasheet, but it (as expected) only describes the package, not the recommended PCB footprint. I, of course, have the die WLCSP package size and pad spacing from the datasheet, so that's not an issue. All I need is the recommended pad size to complete the footprint myself. Any suggestions?


      Edit: I found an application note from Freescale (now NXP), AN3846: Wafer Level Chip Scale Package (WLCSP), from 2012 that provides guidance for their WLCSP packages for both PCB layout and manufacturing. There is a copy here:




      They say their their solder balls are 0.250mm in diameter, but Cypress says theirs are 0.260mm. I am going to guess that if I scaled the pad sizes by 0.260mm/0.250mm = 1.04, that I would get the right pad sizes for the process specified by Freescale/NXP. It's a bit of a bummer that Cypress doesn't seem to have any guidance at all on this even though they provide WLCSP packaged chips.