BLE receive buffer limit

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BrVa_4472456
Level 2
Level 2
10 replies posted 5 replies posted 5 questions asked

Hi,

Just curious how/if the BLE component is physically limited by the number of packets it can handle at the same time? Any insight on how the physical reception works at the lower layers is going to help the design within our application.

Thanks!

Bryan

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1 Solution
Yugandhar
Moderator
Moderator
Moderator
500 solutions authored 1000 replies posted 5 likes given

Hello,

1. Total number of Rx buffer configuration per LL Connection for BLE Stack is defined by the macro CY_BLE_LL_DEFAULT_NUM_ACL_RX_PACKETS, this Macro will give the Number of Rx ACL Packet buffers, this shall not change as this should not be user configurable parameter. CY_BLE_LL_MAX_RX_PAYLOAD_SIZE will set the RX buffer size. Please refer to the MACROS in cy_ble_stack.h file for more information.

2. Cy_BLE_ProcessEvents() function is used for checking the internal task queue in the BLE Stack, and pending operation of the BLE Stack, if any. Please refer to the AN215671 - PSoC 6 MCU - Firmware Design for BLE Applications datasheet for more information.

Thanks,
P Yugandhar.

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2 Replies
Yugandhar
Moderator
Moderator
Moderator
500 solutions authored 1000 replies posted 5 likes given

Hello,

1. Total number of Rx buffer configuration per LL Connection for BLE Stack is defined by the macro CY_BLE_LL_DEFAULT_NUM_ACL_RX_PACKETS, this Macro will give the Number of Rx ACL Packet buffers, this shall not change as this should not be user configurable parameter. CY_BLE_LL_MAX_RX_PAYLOAD_SIZE will set the RX buffer size. Please refer to the MACROS in cy_ble_stack.h file for more information.

2. Cy_BLE_ProcessEvents() function is used for checking the internal task queue in the BLE Stack, and pending operation of the BLE Stack, if any. Please refer to the AN215671 - PSoC 6 MCU - Firmware Design for BLE Applications datasheet for more information.

Thanks,
P Yugandhar.

Awesome, this is exactly the information I was lookng for!

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