could you please let us know the reason why you would like to know the time from POR to execute reset vector’s code?
And could you please elaborate what "execute reset vector's code" means?
DS describes about POR trip voltage, but not about POR’s time.
So customer would like to know the time it takes for POR to start and complete.
They think that reset vector table’s address is read after POR is completed.
So they would like to know PSoC4 and PSoC4S time from POR starts to until it.
Based on CY8C4xxx, CYBLxxxx Programming Specifications (Document Number: 002-22325 Rev. *E)
From external reset released to beginning of "boot code" is <1ms.
PC (program counter in ARM core) would be be "reset" address in vector table during core reset.
And this would be same between PSoC4 and PSoC4S.
is this time what you would like to know?
Thank you for your response.
I understand that the time to complete POR is less than 1ms.