1 2 3 4 Previous Next 53 Replies Latest reply on Apr 14, 2020 9:12 PM by WGT_4383351

    Complex GPIF configuration

    WGT_4383351

      In the Master/Slave example of AN87216, the GPIF is configured to be one M2S and one S2M channel, both with the same buffer size and count.

       

      How to configure GPIF in a more complex way:

       

      1. More channels, like 5 channel, is more GPIF address like 3 bit address enought? Is there innate limit of GPIF channels? Remember there is something like "16 channel in total and only 1 channel per 4 channel".

       

      2. Async channel:

      channel 1: M2S 16KB*4

      channel 2: S2M 1KB*4

      channel 3: M2S 512B*2

      channel 4: S2M 512B*2

      channel 5: S2M 512B*2

       

      Is there any GPIF designer examples for such configurations?

        • 1. Re: Complex GPIF configuration
          JayakrishnaT_76

          Hello,

           

          Please go through the following Application Note which describes Slave FIFO interface using 5 bit addressing mode.

          https://www.cypress.com/file/132506/download

           

          Best Regards,

          Jayakrishna

          1 of 1 people found this helpful
          • 2. Re: Complex GPIF configuration
            WGT_4383351

            Are you sure that document is also about different configuration on different channels? Different cofiguration on different channel is more important than >4 channel.

            • 3. Re: Complex GPIF configuration
              JayakrishnaT_76

              Hello,

               

              The Application note that I shared in my previous response is for making use of more than 4 sockets. The firmware for the same can be found in the following location of FX3 SDK

              C:\Program Files (x86)\Cypress\EZ-USB FX3 SDK\1.3\firmware\slavefifo_examples

               

              You can make use of slfifosync5bit or slfifoasync5bit project depending on your application. You can configure the DMA buffer size and the count for each channel depending on your requirement. Please go through the application note before making any edits in the firmware.

               

              Best Regards,

              Jayakrishna

              • 4. Re: Complex GPIF configuration
                WGT_4383351

                Is there some GPIF designer project for 2bit address and different DMA buffer size for different channels?

                • 5. Re: Complex GPIF configuration
                  JayakrishnaT_76

                  Hello,

                   

                  For 2 bit addressing mode, you can refer to the application note AN65974. The link to the application note is given below:

                  https://www.cypress.com/file/136056/download

                   

                  The project associated with this application note has 2 threads. One for external master to read data from the FX3's FIFO and the other for the external master to write data into FX3's FIFO. You can modify the size allocated for DMA channel in the firmware. At present, the size for the DMA buffers allocated to both the channels are the same. This is because the dmaCfg.size and dmaCfg.count are not changed after the creation of First channel. Please refer to the following code snippet:

                   

                   

                  As you can see, the dmaCfg.size and dmaCfg.count are not changed after the creation of DMA channel from U to P Port. If you want to change the size and count for the P to U Port channel, then update dmaCfg.size and dmaCfg.count just before the following statement:

                   

                  dmaCfg.prodSckId = CY_FX_PRODUCER_PPORT_SOCKET;

                   

                  Best Regards,

                  Jayakrishna

                  • 6. Re: Complex GPIF configuration
                    WGT_4383351

                    What about GPIF designer project? Shoudn't the project have more complex state machine, that set counters depend on GPIF threads? For one TX and one RX thread, the counter in GPIF read and write state machins can be modified independenly. But if there is 2 TX and 2 RX GPIF threads, and each have specific counter setting, how to designe the GPIF designer project - this is the main question.

                    • 7. Re: Complex GPIF configuration
                      JayakrishnaT_76

                      Hello,

                       

                      There is no GPIF II example project available for your requirement with us now. In the AN87216 example project, the thread switching is done by the master by driving the address lines A1:0. For the slave side, in all states, IN ADDR action is performed to sample the address lines and find the corresponding thread before performing the desired actions. So, the slave state machine need not be changed, but to implement your requirement the master state machine need to be changed. We do not have an example readily available for this as of now. You can try developing the state machine for master and we can support if you face any issues. You can refer to the documents in the following location for developing your own state machine:

                      C:\Program Files (x86)\Cypress\EZ-USB FX3 SDK\1.3\doc\GPIFII_Designer

                       

                      Best Regards,

                      Jayakrishna

                      • 8. Re: Complex GPIF configuration
                        WGT_4383351

                        "We do not have an example readily available for this as of now"

                         

                        are you sure? Any cofiguration that need uses than 2 thread in one direction will need a master state machine that control the address[1:0] depend on the active thread. No such example means every example is for 1TX/1RX/1TX+1RX.

                        • 9. Re: Complex GPIF configuration
                          JayakrishnaT_76

                          Hello,

                           

                          Yes, we do not have an example that has more than one TX or RX threads.

                           

                          Best Regards,

                          Jayakrishna

                          • 10. Re: Complex GPIF configuration
                            WGT_4383351

                            When add a second master to slave branch, the condition is DMA_RDY_TH2, but there is error message in GPIF designer:

                             

                            DMA_RDY_TH1 and DMA_RDY_TH2 cannot be used together in the outgoing equations from the state RD_WR_IDLE.

                            • 11. Re: Complex GPIF configuration
                              WGT_4383351

                              Can you design an example of master/slave that use all four GPIF threads, 2 M2S and 2 S2M threads?

                               

                              There are already obstacles like early/late and related limitations, and now there is limitation about DMA thread conditions. More limits may come out in the future.

                              • 12. Re: Complex GPIF configuration
                                JayakrishnaT_76

                                Hello,

                                 

                                Please find the modified state machine for master and slave along with the firmware projects for the same. The GPIF project for master is now made using same counter values for all the threads. Please note that the GPIF Designer only provides 3 counters : Data Counter, Addr Counter and CTRL Counter. So you can only use 3 counts at a time. This means that 2 DMA channels will have the same buffer size.

                                Please use one datapath at a time. That is M2S through one thread only. Use of more than one datapath might give you errors. Also, send full buffers only.

                                Please note that we currently do not have a setup to test these projects because do not have sufficient kits to test it with us at the moment. Please test this using your setup and let us know the results. Also make sure that the device is connected to a USB 3.0 port on host as the descriptors are modified only for Superspeed mode only.

                                 

                                Best Regards,

                                Jayakrishna

                                1 of 1 people found this helpful
                                • 13. Re: Complex GPIF configuration
                                  JayakrishnaT_76

                                  Hello,

                                   

                                  In addition to my previous response, please add the following lines of code below the statement CyU3PGpifSocketConfigure(1, CY_U3P_PIB_SOCKET_1, 0, CyFalse, 1); in the AutoSlave project.

                                   

                                  1. CyU3PGpifSocketConfigure(2, CY_U3P_PIB_SOCKET_2, 4, CyFalse, 7);

                                  2. CyU3PGpifSocketConfigure(3, CY_U3P_PIB_SOCKET_3, 0, CyFalse, 1);

                                   

                                  Best Regards,

                                  Jayakrishna

                                  1 of 1 people found this helpful
                                  • 14. Re: Complex GPIF configuration
                                    WGT_4383351

                                    CyU3PGpifSocketConfigure

                                    This is nice, are there other modifications needed that is outside the control of GPIF compiler?

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