5 Replies Latest reply on Apr 2, 2020 9:17 PM by YatheeshK_36

    FX2LP Bidirectional FIFO

    DaLe_778646

      Hi,

       

      I'm looking into using the CY7C68013 as an interface to provide 4 channels out, 8 channels in (4 of these channels are simply the output channels looped back, either in the FX2, or physically), continuously sampling and sending at 1MHz (internal clock). If the output data dries up, the output pins just remain unchanged, but the input data keeps coming back.

       

      Is this possible with the above IC?

       

      Regards,

      David

        • 1. Re: FX2LP Bidirectional FIFO
          YatheeshK_36

          Hello,

           

          If you want to simultaneously read and write using the external interface, you cannot use FX2LP in GPIF master or in Slave FIFO mode.

          The only option is use the GPIOs in this case.

          The internal clock is configurable using the CPUCS register.

          Please refer to the datasheet and EZ-USB Technical Reference Manual for more details.

           

          Thanks,

          Yatheesh

          • 2. Re: FX2LP Bidirectional FIFO
            DaLe_778646

            Hi Yatheesh,

             

            Thanks for the reply. You say that the GPIO must be used; does this mean all timing, sampling, USB sending/finalising, etc. will have to be controlled via the 8051?

             

            Regards,

            David

            • 3. Re: FX2LP Bidirectional FIFO
              YatheeshK_36

              Hello David,

               

              Yes, your understanding is correct. The operations must be controlled by the 8051 and is simple. Please refer to the technical reference manual for more details.

              Also If you can tell me the entire application, I can suggest you if it can be done in a better way.

               

              Thanks,

              Yatheesh

              • 4. Re: FX2LP Bidirectional FIFO
                DaLe_778646

                Ok, thank you. I will have to see what I can find in the two documents you mentioned, and hopefully can find some example code online. The application is simply four channels of async serial TX/RX. The state of both the TX and RX pins are sent back in a single byte each sample, so that the delay between transmitted data and its response can be calculated, ignoring any OS/USB delays. The logic might be as follows:

                 

                void periodic_timer_interrupt_handler() {

                  if(OUT_queue.hasData())

                     PORTA = OUT_queue.pop_front() << 4;

                 

                   if(IN_queue.hasSpace())

                     IN_queue.push_back(PORTA);

                }

                // where OUT_queue is the data from the host to the device, IN_queue is the data to be sent from the device to the host, and PORTA is an 8-bit GPIO port, with upper nibble as outputs, and lower nibble as inputs.

                 

                Thanks and regards,

                • 5. Re: FX2LP Bidirectional FIFO
                  YatheeshK_36

                  Hello,

                   

                  Firmware example is present in the FX2LP DVK setup package. More code examples can be found in the community forums.

                   

                  Thanks,

                  Yatheesh