You are correct. There is some confusing information regarding the Timer (FF).
To allow for the HW enable line, the Enable Mode = Software and Hardware.
As you pointed out TMRx_CFG2[1:0] is used to control how the enable signal effects the Timer counting. However the Register TRM indicates these bits are reserved.
The user can directly manipulate these bits (at their own risk). There does not appear to be any API calls to change the Timer FF enable modes.
It's possible, that Cypress chose to limit enable signal control on this fixed function block.