The issue seems to be because the internal routing resource is not sufficient for your specified configuration. It can be either due to all your routing resources being exhausted or certain combination and components exhausted certain parts of the routing resources. For example if your configuration is such that more than 3 analog mux connections are required, but as in hardware only 2 muxes are available you will not be able to find a routing solution. You can check CYDWR-> Analog tab and see how the resources are spread and how connections are made on your selection and configuration of pins. You can try adjusting that. Another ways is to go to CYDWR -> Pins tab and unlock all pins and allow creator to automatically allocate during build. If routing solution is possible, creator will allow building of the project. If the design still fails, the routing you rneed will not be possible. In such cases double checking are doing anything that will bottleneck the whole design. Such as giving connecting mulptile GPIOs to a peripheral output which can be connected only to one, connecting two blocks which cannot be connected physically with the resources etc. CYDWR -Analog tab will give you an idea how to proceed in such cases. You may have to sacrifice additional GPIOs and route this signal outside the board in such cases.
thanks ，I have solved it by allocating the pin automatically
When I add some blocks in the design ,it build failed again . Then I route some pins outside，it works.I have no way to deal with it. Could you help me to check the error of analog routing. I have upload the project .
Thanks and regards,vick.
Try modifying your design something like this.
You may have to use one additional comparator and one extra GPIO. Analog mux bus is a limited resource and when use with a continous time block you have to make sure that you are not overloading. You can also use the two LPcomparators instead of using different comparators too.