New to PSOC so maybe I'm missing something, but I seem to keep finding inconsistencies between the website and reference docs.
My starting requirements were pretty simple: 2 UART ports, 1 SPI, CapSense. Based on SCB documentation it seemed like that would mean 3 SCB blocks minimum.
Based on the "Getting started with PSoC 4" doc (https://www.cypress.com/file/46106/download), it seems like I should be able to use any PSoC 4 family for CapSense, but am limited to 4100S, 4100S+, 4100PS, 4200L, or 4500 for the SCBs. I bought the CY8CKIT-043 to test some things and immediately hit one contradiction, the datasheet and webpage for the chip on the devboard contradict the getting started doc on the number of SCBs. I figured this was a one-off but while looking for a cheaper and smaller chip for my purposes I kept running into things like this.
The final example that has really put me off is in regards to the CY8C4125AZI-M443 chip. I had to find it in the PSOC Creator device selector because the Cypress web-based parametric search doesn't seem to include CapSense (another thing I felt like I must be missing but just couldn't find) and DigiKey has some incorrect info. This chip is part of the PSoC 4100M series, which according to the getting started doc doesn't even exist. Now looking at the number of SCBs, Creator says it has 3, the webpage (https://www.cypress.com/part/cy8c4125azi-m443 ) says it has 4, the datasheet (https://www.cypress.com/file/139961/download ) says 4, and of course the getting started doc doesn't say anything. I created a project with this chip and in reality it seems to only have 2, as it refuses to build with 2 UARTs and an SPI (or 3 SPI that I did as a test, attached).
I really hope someone can make sense of this and explain how it's all consistent and what I'm missing. I would love to use Cypress chips, they seem to have some great features with the SCB and programmable analog stuff, but I just can't if I can't trust the documentation to be consistent, much less correct.
polygons.cydsn.zip 269.1 K