4 Replies Latest reply on Mar 20, 2020 3:46 AM by YatheeshK_36

    Question about transferring data from PC to FPGA by USB3.0

    HuLe_4663291

      Use control center to send three 2M files b0.bin, b10.bin, b100.bin, where b0.bin, b10.bin can succeed, and b100.bin fails. The data in b0.bin is all 0, the data in b10.bin is a cycle from 0 to 9, and the data in b100.bin is a cycle from 0 to 99. Why is this happening?