4 Replies Latest reply on Mar 4, 2020 5:18 AM by KeLa_4479261

    SysTick Timer on the 2400M prototyping kit

    KeLa_4479261

      Good Evening:

       

      I am trying to use the SysTick timer which is part of the cortex M0 family.  I spent some time learning how to use the registers that are part of the SysTick timer structure.

       

      I am attaching the simple code that I am using to try and generate a 10ms ON/OFF cycle on the GPIO pin that I can capture using the Saleae Logic analyzer.  According to ARM documents I should be able to take the SysClk frequency and compute a "period" for the pulse. 

       

      My SysClk is current set at 48Mhz, so a 10ms waveform can be determined by:

      Reload =  (10ms / Clock Period) - 1;

      Reload = .01 * 48 X 10^6 - 1     ==> 479999 ticks

       

      If I program in this value into the SysTick->LOAD register, use the fast GPIO toggle and capture the output, I am getting a pulse that is well under the expect value.

       

              for(;;)

              {
               SysTick->LOAD = 479999;

              SysTick->VAL = 0;

              SysTick->CTRL = SysTick_CTRL_ENABLE_Msk | SysTick_CTRL_CLKSOURCE_Msk;

              while(!(SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk));

              SysTick->CTRL = 0;

              Pin_1_DR |= Pin_1_MASK;  // direct register write this takes 500 nanoseconds

       

                // there is a second block with the same parameters

                Pin_1_DR &= ~Pin_1_MASK;     // direct register write

               }

       

      The digital waveform capture is below.

       

      Help would be appreciated in solving this problem.

       

      I would like to know if I can accurately use the SysTick for microsecond times.

       

      Thank you.

        • 1. Re: SysTick Timer on the 2400M prototyping kit
          MoTa_728816

          Hi,

           

          I tried your program with my CY8CKIT-043.

           

          And the result was High: 9.66ms Low: 10.08ms

          Considering that IMO is +/- 2%, not too bad.

          IMG_4146.JPG

          But your case, it was about twice longer, so I would imagine that your SysClk was not 48MHz but 24MHz.

           

          Please check the following

          (1) Workspace Explorer > Design Wide Resources > Clocks

          Double click somewhere blank area of he Clock Tab.

          000-DWR-Clocks.JPG

          (2) In the "High Frequency Clocks" check if SysClk is 48MHz

          If your system does not allow 48MHz, recalculate the number according to the "real" SysClk frequency.

          001-clock.JPG

           

          moto

          • 2. Re: SysTick Timer on the 2400M prototyping kit
            KeLa_4479261

            Hello Moto:

             

            I loaded your project, the same results.  Everything is high.  I have included two snapshots: the clock page and the logic analyzer.

             

            Problem:

            With your help from before I tried using the PWM blocks with a trigger (perfect).  The problem is they drift from the period enough that the duty cycle I have programmed in to the PWM block changes every time I power up the device.  I am trying to generate a waveform that is on average 492.5 microseconds.  I bumped the SysClk to 48 Mhz and I can not reliably produce on demand this timing.

             

            Is there solution with the PSOC family to generate accurate times in microseconds?

             

             

            Please and thanks,

            Ken.Logic_capture_aproximately_10ms.JPG48Mhz_clock_snapshot.JPG

            • 3. Re: SysTick Timer on the 2400M prototyping kit
              MoTa_728816

              Hi,

               

              From your Clocks table,

              IMO 48MHz +/- 2%

              ILO 32kHz +/- 6.0%

               

              IMHO, your oscilloscope screen is showing "reasonable" result.

               

              > I am trying to generate a waveform that is on average 492.5 microseconds.

               

              The most important question here is how much deviation you can allow.

              If it's +/- 2% current IMO will be fine.

               

              But if you need more accuracy, off my head I can think of the following solutions

              (1) Add an external clock or crystal (if the device accept an external crystal) to ExtClk/ECO

              (2) Add an 32kHz crystal to wco then trim IMO with it

              (3) Use a PSoC with higher accuracy internal clock

               

              In general (1) or (2) is the standard approach, especially if you need high accuracy.

               

              (3) For example 5LP (CY8C5888LTI-LP097) has USB_CLK 48MHz +/- 0.25%

              010-5lp-clocks.JPG

               

              moto

               

               

              • 4. Re: SysTick Timer on the 2400M prototyping kit
                KeLa_4479261

                Hello Moto:

                 

                I just received my 5LP prototyping kit, I will be trying this.

                 

                Thank you.