3 Replies Latest reply on Mar 4, 2020 5:08 PM by BoTa_264741

    PSOC 5LP CY8CKIT-059 WEIGHT SCALE DESIGN

    EdDr_4646716

      Hello everyone

       

      It's my first topic on this forum and I need help with a project that I have.

      I bought the PSOC 5LP kit aiming to design a weight scale after reading about the 20 bit sigma delta ADC and PGA integrated.

      My weight scale is composed by a 20 kg load cell with 2mv/V rated output and the PSOC 5LP. I will also use only 2/3 of the full range of the cell to preserve linearity.

      I thought the PSOC 5LP alone would be enough to present the results with 1 gram accuracy but after reading a lot on the internet and here in the forum, I'm not sure anymore.

       

      One problem is the quantity of samples. Reading this article ( https://www.cypress.com/file/139501/download ) I understood that using only the integrated PGA without any filter or offset correction wouldn't be enough to achieve high accuracy. So, one way to improve accuracy is to use the gain on the sigma delta ADC buffer, but the max gain is only 8x with 23 sps.
      My application is a weight scale that takes the mass of 1 item per second and accept or reject that item. Considering that 0,5 second is the time the item needs to stabilize, i would have only 13 "good samples" to average and make de mcu send an accept or reject signal to the relay.
      One way I think might end this problem is the application of CDS and IIR solution ( https://www.cypress.com/file/119666/download ) with the PGA but I have no idea how the top design would be.
      https://hackster.imgix.net/uploads/attachments/224249/lZl0z872sarenc1gNDE2.png?auto=compress%2Cformat&w=1280&h=960&fit=max
      Would be something like the application above maybe but with the delta sigma replacing the Scan_ADC?
      Other solution is to implement an external PGA but I want to use only the PSOC if possible.
      Would you think is it really possible to achieve 1 gram accuracy with PSOC 5LP using a 20kg load cell?
      Sorry, I'm only a student with scarce knlowdge. And sorry my poor english too.
      Thank you for any reply.
        • 1. Re: PSOC 5LP CY8CKIT-059 WEIGHT SCALE DESIGN
          BoTa_264741

          eddr,

          I recommend to try this solution first:

          HX711: 24-bit Delta Sigma ADC interface for weight scale using PSoC

          HX711_02a.png

           

          This is ready-to use project, using HX711 24-bit DelSig ADC, which is available elsewhere for under $1. Regarding the achieving accuracy of 1g using 20kg load cell (5E-5), please check the attached datasheet Appendix 1, which covers a demo project provided. Using 1kg load cell and a median filter, the short-term accuracy was about 30mg (3E-5), which matches your requirements (but is quite tight!).

           

          Due to load cell signal creep (deformation + temperature drift) the scale should be "tared" after each weighting cycle.

           

          I don't recommend using IIR filter (neither FIR) for weight load application. I find that median filter works best in this case (rejects load spikes and settles faster)

          MedianFilter: sliding window median filter component

           

          Though your approach is entirely doable, I don't recommend it for a beginner project. Another advantage of staying with HX711 is that less expensive processor (PSoC4) can be used instead of PSoC5.

          /odissey1

          • 2. Re: PSOC 5LP CY8CKIT-059 WEIGHT SCALE DESIGN
            EdDr_4646716

            Hello, Bota

             

            Thank you for your help.

            I'll try the solution with HX711 but the problem with that set will be the SPS. I think I'll need more than just 10 SPS.

            I saw that there is a shielded version that some people say that works better. Maybe changing the rate to 80 SPS will end the problem...

             

            Dou you have any ideas about the sample rate?

            Thanks again.

            • 3. Re: PSOC 5LP CY8CKIT-059 WEIGHT SCALE DESIGN
              BoTa_264741

              EdDr,

              I recommend to start with existing design and follow up with improvements. For example, the HX711 allows for external clock input, so you can easily speed-up input A from 10Hz to e.g. 20Hz. I don't think the sampling rate is important here; technically you need only one good ADC measurement per load (1 Hz). Note that oversampling of Delta Sigma ADC will not improve S/N.

               

              I am expecting that accuracy of the device will depend on simple things like quality of the load cell, load cell temperature stabilization, device shielding, power supply stability, weights loading mechanism, etc. ----  Not by the PSoC or ADC design implementations! My advise is to get some results ASAP, and then to roll hot potato over to the management: "options A, B, C will cost that, that and that and will take so much time, etc." (brutal force "project management").

              /odissey1