It seems that there is another thread created for the same topic before. The link to the thread created before is mentioned below:
Please carry on the discussion in the thread whose link is provided above.
The issue you mentioned in FX3 to FPGA via GPIF II Interface , I tried to reproduce at my end.
I programmed the FX3 with default firmware and checked the flags before and after transfer (without reading it on GPIF side)
These are the traces i got with proper PCLK - initially low and gets high when some data is transferred. Flags C goes low again when DMA buffer is FULL
I also observed that if PCLK is not given properly these flags misbehave. Trace with flags without proper PCLK and before data transfer .
Initially before transfer both flags will be low as mentioned in state machine. So before transferring you should get both flags low.