2 Replies Latest reply on Feb 24, 2020 3:02 AM by AlGi_4647181

    P-FET dynamic specifications for CCG5/CCG5C



      I am trying to find some good low-profile, low Rdson P-MOS to implement the SINK/SOURCE load switches for a USB C PD input supporting 5-20V @3A max using CCG5 and CCG5C.

      The ones used in the "dual port notebook Application"  reference design (BSC030P03NS3GAUMA1) present your documentation are really bulky and support up to 100A, which is overkill in our application. In addition, it would be great to have some more specific info about the timing requirements (TonDelay, Rise time, Toff Delay, Fall time) of the Pmos in order to be "quick enough" to be able to:


      - Successfully perform Fast Role Swap

      - Protect the system from over-current/over-voltage


      Doing a bit of research I have noticed that most of P-mos have a from 100-200 ns TonDelay+RT. Is this fast enough? Currently looking at these two models:


      - Si5419DU-T1-GE3

      - CSD75211W1723


      Any thoughts on this? Any other suggestions?


      Thank you.


      Best regards,