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1). We are develop product using CCGx SDK - CYPD3120.
it can FW upgrade by EZ-PD configuration utility but we need to customize it.
so please provide USB Bootloader windows F/W upgrade GUI example code to us .
2). We also try ADC function on P2_4 pin and connect a VR (Variable Resistor) to P2_4 pin.
below is our test code :
hsiom_set_config (GPIO_PORT_2_PIN_4, HSIOM_MODE_AMUXA);
adc_level = pd_adc_sample(0, PD_ADC_ID_1, PD_ADC_INPUT_AMUX_A);
hsiom_set_config (GPIO_PORT_2_PIN_4, HSIOM_MODE_GPIO);
SW_Tx_UART_1_PutChar(adc_level);
test result : P2_4 input voltage = 0 ~ 3.3V , level = 0 ~ 0xB5
We get adc_level ragne is 0 ~ 0xB5, not what we expected 0 ~ 0xFF ( full range )
How to solve it ?
Solved! Go to Solution.
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Hi Ivan,
Your observe is correct, you could refer below parameter in the SDK:
typedef enum PD_ADC_VREF_T
{
PD_ADC_VREF_PROG = 0, /**< Programmable reference voltage from the RefGen block. */
PD_ADC_VREF_VDDD /**< VDDD supply used as ADC reference voltage. */
} PD_ADC_VREF_T;
The CCG3 using 2.0V reference voltage by default.
Best Regards,
Lisa
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Hi ,
1. For the USB bootloader FW upgrade, Cypress do not have plan to release the example code on websites. Please contact your local sales/FAE if you have any further requirements.
2. Could you please kindly refer the ADC usage case in the firmware example code and test it?
pd_adc_calibrate(port, APP_VBUS_POLL_ADC_ID);
Cydelay(10);
level = pd_adc_sample(port, APP_VBUS_POLL_ADC_ID, APP_VBUS_POLL_ADC_INPUT);
Best Regards,
Lisa
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Hi, Lisa,
it will cause chip RESET
BR
Ivan
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Hi, Lisa,
if select AMUX_A, it will cause chip RESET.
if select AMUX_B, the adc output value can't full range.
BR
Ivan
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Hi Ivan,
Your observe is correct, you could refer below parameter in the SDK:
typedef enum PD_ADC_VREF_T
{
PD_ADC_VREF_PROG = 0, /**< Programmable reference voltage from the RefGen block. */
PD_ADC_VREF_VDDD /**< VDDD supply used as ADC reference voltage. */
} PD_ADC_VREF_T;
The CCG3 using 2.0V reference voltage by default.
Best Regards,
Lisa