It's mentioned in FM3 Peripheral Manual doc on page#30 as following for the interrupt priority level setting -
Also, interrupt priority register (from 0xE000E400) is comprised of 4 bits, and 16 interrupt priority levels can be configured.
For the details of peripheral interrupts, see the chapter of the target "Interrupts" after check the product currently used with "Configuration of interrupts", and for NMI operations, see also another chapter "External Interrupt and NMI Control Block".
i check the interrupt part , but no description of interrupt priority register; Due to the 16 interrupt priority levels is controlled by 4bit, and what's other bit mean?what's the name of interrupt priority register? this below information is too abstract. if you have the register description.
As communicated, there is no specific documentation for the registers. PDL code is a good reference.